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ST72324BJ2 датащи(PDF) 74 Page - STMicroelectronics |
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ST72324BJ2 датащи(HTML) 74 Page - STMicroelectronics |
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74 / 188 page ![]() On-chip peripherals ST72324B 74/188 Input capture In this section, the index, i, may be 1 or 2 because there are two input capture functions in the 16-bit timer. The two 16-bit input capture registers (IC1R/IC2R) are used to latch the value of the free running counter after a transition is detected on the ICAPi pin (see Figure 42). The ICiR registers are read-only registers. The active transition is software programmable through the IEDGi bit of Control Registers (CRi). Timing resolution is one count of the free running counter: (fCPU/CC[1:0]). Procedure To use the input capture function select the following in the CR2 register: ● Select the timer clock (CC[1:0]) (see Table 49). ● Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2 pin must be configured as floating input or input with pull-up without interrupt if this configuration is available). Select the following in the CR1 register: ● Set the ICIE bit to generate an interrupt after an input capture coming from either the ICAP1 pin or the ICAP2 pin ● Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the ICAP1pin must be configured as floating input or input with pull-up without interrupt if this configuration is available). When an input capture occurs: ● ICFi bit is set. ● The ICiR register contains the value of the free running counter on the active transition on the ICAPi pin (see Figure 42). ● A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC register. Otherwise, the interrupt remains pending until both conditions become true. Clearing the Input Capture interrupt request (that is, clearing the ICFi bit) is done in two steps: 1. Reading the SR register while the ICFi bit is set 2. An access (read or write) to the ICiLR register Table 43. Input capture byte distribution Register MS byte LS byte ICiR ICiHR ICiLR |
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