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ST72324BJ2 датащи(PDF) 76 Page - STMicroelectronics |
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ST72324BJ2 датащи(HTML) 76 Page - STMicroelectronics |
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76 / 188 page ![]() On-chip peripherals ST72324B 76/188 Output compare In this section, the index, i, may be 1 or 2 because there are two output compare functions in the 16-bit timer. This function can be used to control an output waveform or indicate when a period of time has elapsed. When a match is found between the Output Compare register and the free running counter, the output compare function: – Assigns pins with a programmable value if the OCiE bit is set – Sets a flag in the status register – Generates an interrupt if enabled Two 16-bit registers Output Compare register 1 (OC1R) and Output Compare register 2 (OC2R) contain the value to be compared to the counter register each timer clock cycle. These registers are readable and witable and are not affected by the timer hardware. A reset event changes the OCiR value to 8000h. Timing resolution is one count of the free running counter: (fCPU/CC[1:0]). Procedure To use the Output Compare function, select the following in the CR2 register: ● Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output compare i signal. ● Select the timer clock (CC[1:0]) (see Table 49). And select the following in the CR1 register: ● Select the OLVLi bit to applied to the OCMPi pins after the match occurs. ● Set the OCIE bit to generate an interrupt if it is needed. When a match is found between OCRi register and CR register: ● OCFi bit is set ● The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset) ● A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is cleared in the CC register (CC). The OCiR register value required for a specific timing application can be calculated using the following formula: Where: ∆t = Output compare period (in seconds) fCPU = CPU clock frequency (in hertz) PRESC = Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits; see Table 49) Table 44. Output compare byte distribution Register MS byte LS byte OCiR OCiHR OCiLR ∆ OCiR = ∆t * fCPU PRESC |
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