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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST72324BJ2 датащи(PDF) 83 Page - STMicroelectronics |
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ST72324BJ2 датащи(HTML) 83 Page - STMicroelectronics |
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83 / 188 page  ST72324B On-chip peripherals 83/188 10.3.4 Low power modes 10.3.5 Interrupts Table 45. Effect of low power modes on 16-bit timer Mode Description Wait No effect on 16-bit timer. Timer interrupts cause the device to exit from Wait mode. Halt 16-bit timer registers are frozen. In Halt mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous count when the MCU is woken up by an interrupt with Exit from Halt mode capability or from the counter reset value when the MCU is woken up by a reset. If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequently, when the MCU is woken up by an interrupt with Exit from Halt mode capability, the ICFi bit is set, and the counter value present when exiting from Halt mode is captured into the ICiR register. Table 46. 16-bit timer interrupt control/wake-up capability(1) 1. The 16-bit timer interrupt events are connected to the same interrupt vector (see Section 7: Interrupts). These events generate an interrupt if the corresponding Enable Control bit is set and the interrupt mask in the CC register is reset (RIM instruction). Interrupt event Event flag Enable Control bit Exit from WAIT Exit from HALT Input Capture 1 event/counter reset in PWM mode ICF1 ICIE Yes No Input Capture 2 event ICF2 Output Compare 1 event (not available in PWM mode) OCF1 OCIE Output Compare 2 event (not available in PWM mode) OCF2 Timer Overflow event TOF TOIE |
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