AMC131M01DFMR datasheet(25/81 Pages) TI

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After two conversions, the device switches to and remains in the sinc3 filter path until the next time the device is

powered down or reset.

The fast-settling filter exhibits wider bandwidth and less stop-band attenuation than the sinc3 filter. Consequently,

the noise performance when using the fast-settling filter is not as high as with the sinc3 filter. The first two

samples available from the AMC131M01 after a supply ramp or reset have the noise performance and frequency

response corresponding to the fast-settling filter, whereas subsequent samples have the noise performance and

frequency response consistent with the sinc3 filter. See the Start-Up Behavior After Power-Up section for more

details regarding the start-up capabilities of the AMC131M01.

8.3.11.1.2 SINC3 and SINC3 + SINC1 Filter

The AMC131M01 selects the sinc3 filter path two conversions after power-up or device reset. For OSR settings

of 64 to 1024, the sinc3 filter output directly feeds into the global-chop and calibration logic. For OSR settings of

2048 and higher, the sinc3 filter is followed by a sinc1 filter. The sinc3 filter operates at a fixed OSR of 1024 in this

case while the sinc1 filter implements the additional OSRs of 2 to 16. Thus, when an OSR of 4096 (for example)

is selected, the sinc3 filter operates at an OSR of 1024 and the sinc1 filter operates at an OSR of 4.

The filter has infinite attenuation at integer multiples of the data rate except for integer multiples of fMOD. As

with all digital filters, the digital filter response of the AMC131M01 repeats at integer multiples of the modulator

frequency, fMOD. The data rate and filter notch frequencies scale with fMOD.

When possible, plan frequencies for unrelated periodic processes in the application for integer multiples of the

data rate such that any parasitic effect on data acquisition is effectively canceled by the notches of the digital

filter. Avoid frequencies near integer multiples of fMOD whenever possible because tones in these bands can

alias to the band of interest.

The sinc3 and sinc3 + sinc1 filters require time to settle after the ADC is enabled, the multiplexer or gain

setting is changed, or a resynchronization event occurs. See the Synchronization section for more details on

resynchronization. Table 8-5 lists the settling times of the sinc3 and sinc3 + sinc1 filters for each OSR setting.

The AMC131M01 does not gate unsettled data. Therefore, the host must account for the filter settling time and

disregard unsettled data if any are read. Wait for the duration of the settling times listed in Table 8-5 plus one

additional conversion cycle before the data that was read can be considered valid.

Table 8-5. Digital Filter Settling Times

OSR (OVERALL)

OSR (SINC3)

OSR (SINC1)

SETTLING TIME,

detailed (tCLKIN)

SETTLING TIME, total

(tCLKIN)

N/A

3 × 64 + 44 + 4

240

128

N/A

3 × 128 + 44 + 4

432

256

N/A

3 × 256 + 44 + 4

816

512

N/A

3 × 512 + 44 + 4

1584

1024

N/A

3 × 1024 + 44 + 4

3120

2048

1024

6 × 1024 + 44 + 4

6192

4096

1024

10 × 1024 + 44 + 4

10288

8192

1024

18 × 1024 + 44 + 4

18480

16384

1024

34 × 1024 + 44 + 4

34864

8.3.11.2 Digital Filter Characteristic

Equation 6 calculates the z-domain transfer function of a sinc3 filter that is used for OSRs of 1024 and lower.

H z

N 1

(6)

where:

• N is the OSR

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AMC131M01

SBASA57 – SEPTEMBER 2023

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