AMC131M01DFMR datasheet(34/81 Pages) TI

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determined to be synchronized and therefore no action is taken. If there is misalignment, the digital filters on the

device are reset to be synchronized with the SYNC/RESET pulse.

Figure 8-16 shows the behavior after a synchronization pulse on the SYNC/RESET pin for OSR = 1024. As

explained in the SINC3 and SINC3 + SINC1 Filter section, because of the settling of the digital filter, the first two

conversion results are unsettled data and must be ignored.

SYNC/RESET

DRDY

Unsettled

filter data

Unsettled

filter data

Valid Sinc

filter data

Valid Sinc

filter data

DATA

CLKIN

DATA

...

DATA

Figure 8-16. Synchronization Timing for OSR = 1024

In global-chop mode, conversions are always immediately restarted at the falling edge of the SYNC/RESET pin.

8.4.6 Conversion Modes

There are two ADC conversion modes on the AMC131M01: continuous-conversion and global-chop mode.

Continuous-conversion mode is a mode where ADC conversions are generated constantly by the ADC at a

rate defined by fMOD / OSR. Global-chop mode differs from continuous-conversion mode because global-chop

periodically chops (or swaps) the inputs, which reduces system offset errors at the cost of settling time between

the points when the inputs are swapped. In either continuous-conversion or global-chop mode, there are two

power modes that provide flexible options to scale power consumption with bandwidth and dynamic range. The

Power Modes section discusses these power modes in further detail.

8.4.6.1 Continuous-Conversion Mode

Continuous-conversion mode is the mode in which ADC data are generated constantly at the rate of fMOD /

OSR. New data are indicated by a DRDY falling edge at this rate. Continuous-conversion mode is intended for

measuring AC signals because this mode allows for higher output data rates than global-chop mode.

8.4.6.2 Global-Chop Mode

The AMC131M01 incorporates a global-chop mode option to reduce offset error and offset drift inherent to the

device resulting from mismatch in the internal circuitry to very low levels. When global-chop mode is enabled

by setting the GC_EN bit in the GLOBAL_CHOP_CFG register, the device uses the conversion results from

two consecutive internal conversions taken with opposite input polarity to cancel the device offset voltage.

Conversion n is taken with normal input polarity. The device then reverses the internal input polarity for

conversion n + 1. The average of two consecutive conversions (n and n + 1, n + 1 and n + 2, and so on)

yields the final offset compensated result.

AMC131M01

SBASA57 – SEPTEMBER 2023

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