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AMC131M01DFMR датащи(PDF) 54 Page - Texas Instruments |
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AMC131M01DFMR датащи(HTML) 54 Page - Texas Instruments |
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54 / 81 page ![]() 8.6.6 CFG Register (Address = 06h) [Reset = 0600h] Return to the Summary Table. Figure 8-33. CFG Register 15 14 13 12 11 10 9 8 RESERVED GPO_EN GPO_DAT GC_DLY[3:0] GC_EN R/W-0b R/W-0b R/W-0b R/W-0011b R/W-0b 7 6 5 4 3 2 1 0 RESERVED R/W-00000000b Table 8-18. CFG Register Field Descriptions Bit Field Type Reset Description 15 RESERVED R/W 0b Reserved Always write 0b 14 GPO_EN R/W 0b Digital output enable Enables digital output (GPO) functionality at AIN2P pin. 0b = Digital output disabled 1b = Digital output enabled 13 GPO_DAT R/W 0b Digital output data Digital output (GPO) data if GPO_EN = 1b. 0b = Zero output 1b = One output 12:9 GC_DLY[3:0] R/W 0011b Global-chop delay selection Delay in modulator clock periods before measurement begins. 0000b = 2 0001b = 4 0010b = 8 0011b = 16 0100b = 32 0101b = 64 0110b = 128 0111b = 256 1000b = 512 1001b = 1024 1010b = 2048 1011b = 4096 1100b = 8192 1101b = 16384 1110b = 32768 1111b = 65536 8 GC_EN R/W 0b Global-chop enable 0b = Disabled 1b = Enabled 7:0 RESERVED R/W 00000000b Reserved Always write 00000000b AMC131M01 SBASA57 – SEPTEMBER 2023 www.ti.com 54 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AMC131M01 |
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