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AMC131M01DFMR датащи(PDF) 6 Page - Texas Instruments

номер детали AMC131M01DFMR
подробное описание детали  AMC131M01 1-Channel, 64-kSPS, Simultaneous-Sampling, 24-Bit, Reinforced Isolated Delta-Sigma ADC With Integrated DC/DC Converter
PDF  81 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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AMC131M01DFMR датащи(HTML) 6 Page - Texas Instruments

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6.5 Insulation Specifications
over operating ambient temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
External clearance(1)
Shortest pin-to-pin distance through air
≥ 8.0
mm
CPG
External creepage(1)
Shortest pin-to-pin distance across the package surface
≥ 8.0
mm
DTI
Distance through insulation
Minimum internal gap (internal clearance) of the double
insulation
≥ 0.021
mm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
≥ 600
V
Material group
According to IEC 60664-1
I
Overvoltage category
per IEC 60664-1
Rated mains voltage ≤ 600 VRMS
I-III
Rated mains voltage ≤ 1000 VRMS
I-II
DIN EN IEC 60747-17 (VDE 0884-17)
VIORM
Maximum repetitive peak
isolation voltage(2)
At AC voltage
1700
VPK
VIOWM
Maximum-rated isolation
working voltage(2)
At AC voltage (sine wave)
1200
VRMS
At DC voltage
1700
VDC
VIOTM
Maximum transient
isolation voltage
VTEST = VIOTM, t = 60 s (qualification test),
VTEST = 1.2 × VIOTM, t = 1 s (100% production test)
7070
VPK
VIMP
Maximum impulse voltage(3)
Tested in air, 1.2/50-µs waveform per IEC 62368-1
7700
VPK
VIOSM
Maximum surge
isolation voltage (4)
Tested in oil (qualification test),
1.2/50-µs waveform per IEC 62368-1
10000
VPK
qpd
Apparent charge(5)
Method a, after input/output safety test subgroups 2 and 3,
Vpd(ini) = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM, tm = 10 s
≤ 5
pC
Method a, after environmental tests subgroup 1,
Vpd(ini) = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM, tm = 10 s
≤ 5
Method b1, at preconditioning (type test) and routine test,
Vpd(ini) = 1.2 x VIOTM, tini = 1 s, Vpd(m) = 1.875 × VIORM, tm = 1 s
≤ 5
Method b2, at routine test (100% production)(7),
Vpd(ini) = Vpd(m) = 1.2 x VIOTM, tini = tm = 1 s
≤ 5
CIO
Barrier capacitance,
input to output(6)
VIO = 0.5 VPP at 1 MHz
~4.5
pF
RIO
Insulation resistance,
input to output(6)
VIO = 500 V at TA = 25°C
> 1012
Ω
VIO = 500 V at 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500 V at TS = 150°C
> 109
Pollution degree
2
Climatic category
40/125/21
UL1577
VISO
Withstand isolation voltage
VTEST = VISO, t = 60 s (qualification test),
VTEST = 1.2 × VISO, t = 1 s (100% production test)
5000
VRMS
(1)
Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be
taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the
printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques
such as inserting grooves, ribs, or both on a PCB are used to help increase these specifications.
(2)
This device is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured
by means of suitable protective circuits.
(3)
Testing is carried out in air to determine the surge immunity of the package.
(4)
Testing is carried in oil to determine the intrinsic surge immunity of the isolation barrier.
(5)
Apparent charge is electrical discharge caused by a partial discharge (pd).
(6)
All pins on each side of the barrier are tied together, creating a two-pin device.
(7)
Either method b1 or b2 is used in production.
AMC131M01
SBASA57 – SEPTEMBER 2023
www.ti.com
6
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Product Folder Links: AMC131M01



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