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AMC131M01DFMR датащи(PDF) 60 Page - Texas Instruments |
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AMC131M01DFMR датащи(HTML) 60 Page - Texas Instruments |
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60 / 81 page ![]() 8.6.12 DCDC_CTRL Register (Address = 31h) [Reset = 0000h] Return to the Summary Table. Figure 8-39. DCDC_CTRL Register 15 14 13 12 11 10 9 8 RESERVED DCDC_FREQ[3:0] R/W-0000b R/W-0000b 7 6 5 4 3 2 1 0 RESERVED DCDC_EN R/W-0000000b R/W-0b Table 8-24. DCDC_CTRL Register Field Descriptions Bit Field Type Reset Description 15:12 RESERVED R/W 0000b Reserved Always write 0000b 11:8 DCDC_FREQ[3:0] R/W 0000b DC/DC frequency range selection Selects the range of the modulator clock frequency, based on the frequency at the CLKIN pin and clock divider ratio. 0000b = 3.76 MHz to 4.10 MHz 0001b = 3.52 MHz to 3.84 MHz 0010b = 3.30 MHz to 3.59 MHz 0011b = 3.09 MHz to 3.36 MHz 0100b = 2.89 MHz to 3.15 MHz 0101b = 2.71 MHz to 2.95 MHz 0110b = 2.53 MHz to 2.76 MHz 0111b = 2.37 MHz to 2.59 MHz 1000b = 2.22 MHz to 2.42 MHz 1001b = 2.08 MHz to 2.27 MHz 1010b = 1.95 MHz to 2.12 MHz 1011b = 1.82 MHz to 1.99 MHz 1100b = 1.71 MHz to 1.86 MHz 1101b = 1.60 MHz to 1.74 MHz 1110b = 1.50 MHz to 1.63 MHz 1111b = 1.40 MHz to 1.53 MHz 7:1 RESERVED R/W 0000000b Reserved Always write 0000000b 0 DCDC_EN R/W 0b DC/DC enable Enables the integrated DC/DC converter. 0b = Disabled 1b = Enabled AMC131M01 SBASA57 – SEPTEMBER 2023 www.ti.com 60 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AMC131M01 |
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