AMC131M01DFMR datasheet(62/81 Pages) TI

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9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

9.1 Application Information

9.1.1 Unused Inputs and Outputs

Leave any unused analog inputs floating or connected to HGND.

Do not float unused digital inputs because excessive power-supply leakage current can result. Tie all unused

digital inputs to the appropriate levels, DVDD or DGND. Leave the DRDY pin unconnected if unused.

9.1.2 Antialiasing

An analog low-pass filter is required in front the ADC input to prevent out-of-band noise and interference from

coupling into the band of interest. Because the AMC131M01 is a delta-sigma ADC, the integrated digital filter

provides substantial attenuation for frequencies outside of the band of interest up to the frequencies adjacent

to fMOD. Therefore, a single-order RC filter provides sufficient antialiasing protection in the vast majority of

applications.

Choosing the values of the resistor and capacitor depends on the desired cutoff frequency, limiting source

impedance for the ADC inputs, and providing enough instantaneous charge to the ADC input sampling circuit

through the filter capacitor. Figure 9-1 shows the recommended filter component values.

4.7 nF

To ADC

Inputs

Figure 9-1. Recommended Antialiasing Circuitry

9.1.3 Minimum Interface Connections

Figure 9-2 illustrates how the AMC131M01 can be configured for the minimum number of interface pins. This

configuration is useful when using data isolation to minimize the number of isolation channels required or when

the microcontroller (MCU) pins are limited.

The CLKIN pin requires an LVCMOS clock that can be either generated by the MCU or created using a

local LVCMOS output device. Tie the SYNC/RESET pin to DVDD in hardware if unused. The DRDY pin can

be left floating if unused. Connect either SYNC/RESET or DRDY to the MCU to make sure the MCU stays

synchronized to ADC conversions. If the MCU provides CLKIN, the CLKIN periods can be counted to determine

the sample period rather than forcing synchronization using the SYNC/RESET pin or monitoring the DRDY

pin. Synchronization cannot be regained if a bit error occurs on the clock and samples can be missed if the

SYNC/RESET or DRDY pins are not used. CS can be tied low in hardware if the AMC131M01 is the only device

on the SPI bus. Make sure the data input and output CRC are enabled and are used to guard against faulty

During a read operation, if CS is tied low permanently, all data words must be extracted from the device, no SPI

word can be skipped.

AMC131M01

SBASA57 – SEPTEMBER 2023

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