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TMPR4955AF датащи(PDF) 150 Page - Toshiba Semiconductor |
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TMPR4955AF датащи(HTML) 150 Page - Toshiba Semiconductor |
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150 / 168 page ![]() Chapter 8 TX4955A Processor Interrupts 8-2 8.4 Timer Interrupt The timer interrupt signal is bit 15 of the Cause register, which is bit 7 of the interrupt pending, IP, field. The timer interrupt is set whenever the value of the Count register equals the value of the Compare register. This interrupt is maskable through the IM field of the Status register. Note: Timer Interrupt is doubled as a Int5*. There fore either is selected with the External pin (TintDis). Note: Interrupt register : Please see Chapter 6 External Write Request Figure 8.4.1 TX4955A Interrupt Control Circuit Interrupt register Software Interrupt NMI TintDis Cause resister (Buffer) 6 SysAD 5 4 3 2 1 0 22 21 20 19 18 17 16 0 1 2 3 4 5 6 IP0 IP1 IP2 IP3 IP4 IP5 IP6 8 9 10 11 12 13 14 INT0* INT1* INT2* INT3* INT4* INT5* NMI* IP7 15 Timer interrupt H: INT5* L: Timer L H |
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