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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HC705C9AGRS/D датащи(PDF) 64 Page - NXP Semiconductors |
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HC705C9AGRS/D датащи(HTML) 64 Page - NXP Semiconductors |
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64 / 157 page  General Release Specification Port B MC68HC705C9A — Rev. 2.0 Input/Output Ports Figure 7-1. Port A I/O Circuit 7.4 Port B Port B is an 8-bit bidirectional port. The port B data register is at $0001 and the data direction register (DDR) is at $0005. The contents of the port B data register are indeterminate at initial powerup and must be initialized by user software. Reset does not affect the data registers, but clears the data direction registers, thereby returning the ports to inputs. Writing a one to a DDR bit sets the corresponding port pin to output mode. Each of the port B pins has an optional external interrupt capability that can be enabled by programming the corresponding bit in the port B mask option register ($3FF0). The interrupt option also enables a pullup device when the pin is configured as an input. The edge or edge- and level-sensitivity of the IRQ pin will also pertain to the enabled port B pins. Care needs to be taken when using port B pins that have the pullup enabled. Before switching from an output to an input, the data should be preconditioned to a one to prevent an interrupt from occurring. The port B logic is shown in Figure 7-2. DATA DIRECTION REGISTER BIT LATCHED OUTPUT DATA BIT I/O PIN INPUT REG BIT INPUT I/O OUTPUT INTERNAL HC05 CONNECTIONS Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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