HC705C9AGRSSLASHD datasheet(20/157 Pages) NXP

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General Release Speciﬁcation

Conﬁguration Options

MC68HC705C9A — Rev. 2.0

General Description

1.4 Configuration Options

The options and functions of the MC68HC705C9A can be configured to

emulate either the MC68HC05C9A or the MC68HC05C12A.

The ROM device MC68HC05C9A has eight ROM mask options to select

external interrupt/internal pullup capability on each of the eight port B

bits. Other optional features are controlled by software addressable

registers during operation of the microcontroller. These features are IRQ

sensitivity and memory map configuration.

On the ROM device MC68HC05C12A, all optional features are

controlled by ROM mask options. These features are the eight port B

interrupt/pullup options, IRQ sensitivity, STOP instruction disable, and

COP enable.

On the MC68HC705C9A the ROM mask options of the MC68HC05C9A

and the MC68HC05C12A are controlled by mask option registers

(MORs). The MORs are EPROM registers which must be programmed

appropriately prior to operation of the microcontroller. The software

options of the MC68HC05C9A are implemented by identical software

registers in the MC68HC705C9A.

When configured as an MC68HC05C9A:

•

The entire 16K memory map of the C9A is enabled, including

dual-mapped RAM and EPROM at locations $0020–$004F and

$0100–$017F.

•

C12A options in the C12MOR ($3FF1) are disabled.

•

The C9A option register ($3FDF) is enabled, allowing software

control over the IRQ sensitivity and the memory map

configuration.

•

The C9A COP reset register ($001D) and the C9A COP control

C9A COP and clock monitor.

•

The C12 COP clear register ($3FF0) is disabled.

•

The port D data direction register ($0007) is enabled, allowing

output capability on the seven port D pins.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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