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HC705C9AGRS/D датащи(PDF) 30 Page - NXP Semiconductors |
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HC705C9AGRS/D датащи(HTML) 30 Page - NXP Semiconductors |
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30 / 157 page ![]() General Release Specification Functional Pin Descriptions MC68HC705C9A — Rev. 2.0 General Description trigger as part of its input to improve noise immunity. Refer to Section 4. Interrupts for more detail. 1.7.4 OSC1 andOSC2 These pins provide control input for an on-chip clock oscillator circuit. A crystal connected to these pins provides a system clock. The internal frequency is one-half the crystal frequency. 1.7.5 RESET As an input pin, this active low RESET pin is used to reset the MCU to a known startup state by pulling RESET low. As an output pin, when in MC68HC05C9A mode only, the RESET pin indicates that an internal MCU reset has occurred. The RESET pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to Section 5. Resets for more detail. 1.7.6 TCAP This pin controls the input capture feature for the on-chip programmable timer. The TCAP pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to Section 8. Capture/Compare Timer for more detail. 1.7.7 TCMP The TCMP pin provides an output for the output compare feature of the on-chip programmable timer. Refer to Section 8. Capture/Compare Timer for more detail. 1.7.8 PA0–PA7 These eight I/O lines comprise port A. The state of each pin is software programmable and all port A pins are configured as inputs during reset. Refer to Section 7. Input/Output Ports for more detail. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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