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HC705C9AGRS/D датащи(PDF) 60 Page - NXP Semiconductors |
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HC705C9AGRS/D датащи(HTML) 60 Page - NXP Semiconductors |
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60 / 157 page ![]() General Release Specification COP During Stop Mode MC68HC705C9A — Rev. 2.0 Resets To emulate this feature on the MC68HC705C9A (configured as an MC68HC05C12A), set the STOPDIS bit in the C12MOR. Stop mode will not actually be disabled as on the MC68HC05C12A, but the clock monitor circuit will be activated. If the CPU executes a STOP instruction, the clock monitor will provide a system reset. NOTE: This feature cannot be used with operating frequencies of 200 kHz or less. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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