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HC705C9AGRS/D датащи(PDF) 56 Page - NXP Semiconductors |
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HC705C9AGRS/D датащи(HTML) 56 Page - NXP Semiconductors |
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56 / 157 page ![]() General Release Specification MC68HC05C9A Compatible COP MC68HC705C9A — Rev. 2.0 Resets 5.6.2 C9A COP Control Register The COP control register, shown in Figure 5-5, performs the following functions: • Enables clock monitor function • Enables MC68HC05C9A compatible COP function • Selects timeout duration of COP timer and flags the following conditions: • A COP timeout • Clock monitor reset COPF — Computer Operating Properly Flag Reading the COP control register clears COPF. 1 = COP or clock monitor reset has occurred. 0 = No COP or clock monitor reset has occurred. CME — Clock Monitor Enable This bit is readable any time, but may be written only once. 1 = Clock monitor enabled 0 = Clock monitor disabled $001E Bit 7 654321 Bit 0 Read: 0 0 0 COPF CME COPE CM1 CM0 Write: Reset: 0 0 0 U 0000 = Unimplemented U = Undetermined Figure 5-5. COP Control Register (COPCR) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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