IMX8MPCEC datasheet(83/111 Pages) NXP

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Electrical characteristics

i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021

NXP Semiconductors

3.8.15.2.2

UART receiver

Figure 52 depicts the RS-232 Serial mode receive timing with 8 data bit/1 stop bit format. Table 72 lists

Serial mode receive timing characteristics.

Figure 52. UART RS-232 Serial mode receive timing diagram

3.8.16 USB PHY parameters

The USB PHY parameters meet the electrical compliance requirements listed as following:

•

Universal Serial Bus Revision 3.0 Specification (including ECNs and errata), On-The-Go and Embed-

ded Host Supplement to the USB 3.0 Specification (including ECNS and Errata)

•

Universal Serial Bus Revision 2.0 Specification (including ECNs and errata), On-The-Go and Embed-

ded Host Supplement to the Universal Serial Bus Revision 2.0 Specification (including ECNs and

errata)

3.8.16.1 Pad/Package/Board connections

The USBx_VBUS pin cannot directly connect to 5 V VBUS voltage on the USB2.0 link, each

USBx_VBUS pin must be isolated by an external 30 K

 1% precision resistor if connects to 5 V VBUS.

The USB 2.0 PHY uses USBx_TXRTUNE and an external resistor to calibrate the USBx_DP/DN 45



source impedance. The external resistor value is 200

 1% precision on each of USBx_TXRTUNE pad to

ground.

3.8.16.2 USB PHY worst power consumption

Table 73 shows the USB 2.0 PHY worst power dissipation.

Table 72. RS-232 Serial mode receive timing parameters

Parameter

Symbol

Min

Max

Unit

UA2

Receive Bit Time1

1 The UART receiver can tolerate 1/(16 x F

baud_rate) tolerance in each bit. But accumulation tolerance in one frame must not

exceed 3/(16 x Fbaud_rate).

tRbit

1/Fbaud_rate

2 - 1/(16

x Fbaud_rate)

2 F

baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.

1/Fbaud_rate +

1/(16 x Fbaud_rate)

—

Bit 1

Bit 2

Bit 0

Bit 4

Bit 5

Bit 6

Bit 7

UARTx_RX_DATA

(output)

Bit 3

Start

Bit

STOP

BIT

Start

Bit

Possible

Parity

Bit

Par Bit

UA2

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