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IMX8MPCEC датащи(PDF) 38 Page - NXP Semiconductors

номер детали IMX8MPCEC
подробное описание детали  i.MX 8M Plus Applications Processor Datasheet for Consumer Products
PDF  111 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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IMX8MPCEC датащи(HTML) 38 Page - NXP Semiconductors

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i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021
38
NXP Semiconductors
Electrical characteristics
3.4.2
DDR I/O DC electrical characteristics
The DDR I/O pads support LPDDR 4 and DDR4 operational modes. The DDR Memory Controller
(DDRMC) is compliant with JEDEC-compliant SDRAMs.
DDRMC operation is contingent upon the board’s DDR design adherence to the DDR design and layout
requirements stated in the hardware development guide for the i.MX 8M Plus application processor.
3.4.3
LVDS I/O DC parameters
The LVDS interface complies with TIA/EIA 644-A standard. See TIA/EIA STANDARD 644-A,
“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.
Table 26. GPIO DC parameters
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
High-level output voltage
VOH (1.8 V)
IOH = 1.6/3.2/6.4/9.6 mA (1.8 V)
IOH = 2/4/8/12 mA (3.3 V)
0.8 x VDD
VDD
V
VOH (3.3 V)
0.8 x VDD
VDD
V
Low-level output voltage
VOL (1.8 V)
IOL = 1.6/3.2/6.4/9.6 mA (1.8 V)
IOL = 2/4/8/12 mA (3.3 V)
0
0.2 x VDD
V
VOL (3.3 V)
0
0.2 x VDD
V
High-level input voltage
VIH
0.7 x VDD
VDD + 0.3
V
Low-level input voltage
VIL
-0.3
0.3 x VDD
V
Pull-up resistor
VDD = 1.65 - 1.95V
Temp = 0 - 95 oC
12
22
49
K
Pull-down resistor
13
23
48
K
Pull-up resistor
VDD = 3.0 - 3.6V
Temp = 0 - 95 oC
18
37
72
K
Pull-down resistor
24
43
87
K
High level input current
IIH
-4
4
µA
Low level input current
IIL
-0.7
0.7
µA
Table 27. Additional leakage parameters
Parameter
Symbol
Pins
Min
Max
Unit
High level input current
IIH
USBx_Dx
-30
30
µA
MIPI_CSI
-4
4
ONOFF, POR_B
-1
1
Low level input current
IIL
USBx_Dx
-6
6
µA
MIPI_CSI, ONOFF, POR_B
-0.7
0.7



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