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IMX8MPCEC датащи(PDF) 82 Page - NXP Semiconductors |
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IMX8MPCEC датащи(HTML) 82 Page - NXP Semiconductors |
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82 / 111 page ![]() i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021 82 NXP Semiconductors Electrical characteristics 3.8.15 UART I/O configuration and timing parameters 3.8.15.1 UART RS-232 I/O configuration in different modes The i.MX 8M Plus UART interfaces can serve both as DTE or DCE device. This can be configured by the DCEDTE control bit (default 0—DCE mode). Table 70 shows the UART I/O configuration based on the enabled mode. 3.8.15.2 UART RS-232 Serial mode timing This section describes the electrical information of the UART module in the RS-232 mode. 3.8.15.2.1 UART transmitter Figure 51 depicts the transmit timing of UART in the RS-232 Serial mode, with 8 data bit/1 stop bit format. Table 71 lists the UART RS-232 Serial mode transmit timing characteristics. Figure 51. UART RS-232 Serial mode transmit timing diagram Table 70. UART I/O configuration vs. mode Port DTE Mode DCE Mode Direction Description Direction Description UARTx_RTS_B Output UARTx_RTS_B from DTE to DCE Input UARTx_RTS_B from DTE to DCE UARTx_CTS_B Input UARTx_CTS_B from DCE to DTE Output UARTx_CTS_B from DCE to DTE UARTx_TX_DATA Input Serial data from DCE to DTE Output Serial data from DCE to DTE UARTx_RX_DATA Output Serial data from DTE to DCE Input Serial data from DTE to DCE Table 71. RS-232 Serial mode transmit timing parameters ID Parameter Symbol Min Max Unit UA1 Transmit Bit Time tTbit 1/Fbaud_rate 1 - T ref_clk 2 1 F baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16. 2 T ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider). 1/Fbaud_rate + Tref_clk — Start Bit Bit 1 Bit 2 Bit 0 Bit 4 Bit 5 Bit 6 Bit 7 UARTx_TX_DATA (output) Bit 3 STOP BIT Next Start Bit Possible Parity Bit Par Bit UA1 UA1 UA1 UA1 |
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