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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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IMX8MPCEC датащи(PDF) 55 Page - NXP Semiconductors |
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IMX8MPCEC датащи(HTML) 55 Page - NXP Semiconductors |
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55 / 111 page  Electrical characteristics i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021 NXP Semiconductors 55 3.8.3.2 RMII mode timing In RMII mode, enet1.RMII_CLK is used as the REF_CLK, which is a 50 MHz ± 50 ppm continuous reference clock. Figure 20 shows RMII mode timings. Table 45 describes the timing parameters (M16–M21) shown in the figure. Figure 20. RMII mode signal timing diagram 3.8.3.3 RGMII signal switching specifications The following timing specifications meet the requirements for RGMII interfaces for a range of transceiver devices. Table 45. RMII signal timing ID Characteristic Min. Max. Unit M16 ENET_CLK pulse width high 35% 65% ENET_CLK period M17 ENET_CLK pulse width low 35% 65% ENET_CLK period M18 ENET_CLK to ENET0_TXD[1:0], ENET_TX_DATA invalid 4 — ns M19 ENET_CLK to ENET0_TXD[1:0], ENET_TX_DATA valid — 15 ns M20 ENET_RX_DATAD[1:0], ENET_RX_EN(ENET_RX_EN), ENET_RX_ER to ENET_CLK setup 4— ns M21 ENET_CLK to ENET_RX_DATAD[1:0], ENET_RX_EN, ENET_RX_ER hold 2 — ns enet1.RMII_CLK (input) ENET_TX_EN M16 M17 M18 M19 M20 M21 ENET_RX_DATA[1:0] ENET_TX_DATA (output) ENET_RX_ER ENET_RX_EN (input) |
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