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CS47L35 датащи(PDF) 135 Page - Cirrus Logic |
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CS47L35 датащи(HTML) 135 Page - Cirrus Logic |
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135 / 300 page ![]() DS1085F3 135 CS47L35 4.11 Output Signal Path The headphone/earpiece output path is configurable as a stereo headphone driver (HPOUTL and HPOUTR pins), or as a differential earpiece driver (EPOUTP and EPOUTN pins). The ground-referenced headphone output path incorporates a common mode feedback path for rejection of system-related noise. The headphone and earpiece outputs each support direct connection to external loads, with no requirement for AC coupling capacitors. The speaker output path is configured to drive a differential (BTL) output. The Class D design offers high efficiency at large signal levels. With a suitable choice of external speaker, the Class D output can drive a loudspeaker directly, without any additional filter components. The digital output path provides a stereo pulse-density modulation (PDM) output interface, for connection to external audio devices. A total of two digital output channels are provided. Digital volume control is available on all outputs (analog and digital), with programmable ramp control for smooth, glitch-free operation. A configurable noise-gate function is available on each of the output signal paths. Any two of the output signal paths may be selected as input to the AEC loop-back paths. The CS47L35 incorporates thermal protection functions, and provides short-circuit detection on the Class D speaker and headphone/earpiece output paths. The general-purpose timers (see Section 4.5.3) can also be used as a watchdog function, to trigger a shutdown of the Class D speaker drivers; see Section 4.21. The Class D speaker output is designed to support monitoring of external loudspeakers, giving real-time feedback for algorithms such as Cirrus Logic’s speaker-protection software, running on one of the DSP cores. This enables loudspeakers to be protected against damage from excessive signal levels and other electro-mechanical constraints. This feature requires additional external component connections, as described in Section 4.11.8. The CS47L35 output signal paths are shown in Fig. 4-49. The OUT2, OUT3, and OUT4R paths are not implemented on this device. |
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