CS47L35 datasheet(131/300 Pages) CIRRUS

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DS1085F3

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CS47L35

4.10 SLIMbus Interface Control

Note: SLIMbus audio channels can be supported only when the corresponding ports have been enabled by the manager

device (i.e., in addition to setting the respective enable bits). The status bits in Registers R1527 and R1528

indicate the status of each of the SLIMbus ports.

The system clock, SYSCLK, must be configured and enabled before any audio path is enabled. The SLIMbus audio paths

should be kept disabled (SLIMRXn_ENA = 0, SLIMTXn_ENA = 0) if SYSCLK is not enabled. See Section 4.16 for details

of the system clocks (including requirements for reconfiguring SYSCLK while audio paths are enabled).

4.10.6 SLIMbus Control Register Access

Control register access is supported via the SLIMbus interface. Full read/write access to all registers is possible, via the

user value elements portion of the value map.

If the SLIMbus interface is used to access the DSP firmware memory registers, a system clocking constraint must be

observed: the DSPCLK frequency, if enabled, must be greater than 1.3 x RF, where RF is the SLIMbus root frequency.

Note that, if DSPCLK is disabled (DSP_CLK_ENA = 0), or if accessing other areas of the register map, the timing

constraint is not applicable. See Section 4.4 for details of the DSP Firmware memory. See Section 4.16 for details of the

DSPCLK signal.

required, depending on circumstances: the first CHANGE_VALUE message selects the register page (bits [23:8] of the

control register address); the second message contains the data and bits [7:0] of the register address. The first message

may be omitted if the register page is unchanged from the previous read or write operation.

The required SLIMbus parameters are described in Table 4-55 and Table 4-56, for the generic case of writing the value

0xVVVV to control register address 0xYYYYZZ. Note that it is also possible to write blocks of up to 16 bytes (to consecutive

Table 4-54. SLIMbus Signal Path Enable

Bit

Label

Default

Description

R1525 (0x05F5)

SLIMbus_RX_

Channel_Enable

SLIMRX6_ENA

SLIMbus RX Channel n Enable

0 = Disabled

1 = Enabled

SLIMRX5_ENA

SLIMRX4_ENA

SLIMRX3_ENA

SLIMRX2_ENA

SLIMRX1_ENA

R1526 (0x05F6)

SLIMbus_TX_

Channel_Enable

SLIMTX6_ENA

SLIMbus TX Channel n Enable

0 = Disabled

1 = Enabled

4SLIMTX5_ENA

3SLIMTX4_ENA

2SLIMTX3_ENA

1SLIMTX2_ENA

0SLIMTX1_ENA

R1527 (0x05F7)

SLIMbus_RX_

Port_Status

SLIMRX6_PORT_STS

SLIMbus RX Channel n Port Status

(Read only)

0 = Disabled

1 = Configured and active

SLIMRX5_PORT_STS

SLIMRX4_PORT_STS

SLIMRX3_PORT_STS

SLIMRX2_PORT_STS

SLIMRX1_PORT_STS

R1528 (0x05F8)

SLIMbus_TX_

Port_Status

SLIMTX6_PORT_STS

SLIMbus TX Channel n Port Status

(Read only)

0 = Disabled

1 = Configured and active

4SLIMTX5_PORT_STS

3SLIMTX4_PORT_STS

2SLIMTX3_PORT_STS

1SLIMTX2_PORT_STS

0SLIMTX1_PORT_STS

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