AD9520-1SLASHPCBZ datasheet(58/80 Pages) AD

58 / 80 page

AD9520-1

Data Sheet

Rev. B | Page 58 of 80

EEPROM OPERATIONS

The AD9520-1 contains an internal EEPROM (nonvolatile

memory). The EEPROM can be programmed by users to create

and store a user-defined register setting file when the power is

off. This setting file can be used for power-up and chip reset as a

default setting. The EEPROM size is 512 bytes.

Note that, to guarantee proper loading of the EEPROM during

startup, a high-low-high pulse on the RESET pin should occur

after the power supply has stabilized.

During the data transfer process, the write and read registers via

the serial port are generally not available except for one readback

To determine the data transfer state through the serial port

in SPI mode, users can read the value of STATUS_EEPROM

(1b = in process; 0b = completed).

In I²C mode, the user can address the AD9520-1 slave port with

the external I²C master (send an address byte to the AD9520-1).

If the AD9520-1 responds with a no acknowledge bit, the data

transfer process does not take place. If the AD9520-1 responds with

an acknowledge bit, the data transfer process is completed. The

user can monitor the STATUS_EEPROM register or program

the STATUS pin to monitor the status of the data transfer.

WRITING TO THE EEPROM

The EEPROM cannot be programmed directly through the serial

port interface. To program the EEPROM and store a register

setting file, do the following:

1. Program the AD9520-1 registers to the desired circuit state. If

the user wants the PLL to lock automatically after power-up,

the VCO calibration now bit (Register 0x018[0]) must be

set to 1b. This allows VCO calibration to start

automatically after register loading. Note that a valid input

reference signal must be present during VCO calibration.

2. Program the EEPROM buffer registers, if necessary (see

the Programming the EEPROM Buffer Segment section).

This step is necessary only if the user wants to use the

EEPROM to control the default setting of some (but not

all) of the AD9520-1 registers, or to control the register

setting update sequence during power-up or chip reset.

3. Set the enable EEPROM write bit (Register 0xB02[0]) to 1b

to enable the EEPROM.

4. Set the REG2EEPROM bit (Register 0xB03[0]) to 1b.

5. Set the IO_UPDATE bit (Register 0x232[0]) to 1b, which

starts the process of writing data into the EEPROM to

create the EEPROM setting file. This enables the AD9520-1

EEPROM controller to transfer the current register values,

as well as the memory address and instruction bytes from

the EEPROM buffer segment, into the EEPROM. After the

write process is completed, the internal controller sets

The STATUS_EEPROM bit in the readback register

(Register 0xB00[0]) is used to indicate the data transfer

status between the EEPROM and the control registers

(0b = complete/inactive; 1b = in process/ active). At the start

of the data transfer, STATUS_EEPROM is set to 1b by the

EEPROM controller and cleared to 0b at the end of the data

transfer. The STATUS_EEPROM bit can be accessed through

the STATUS pin when the STATUS pin is programmed to

monitor the STATUS_EEPROM bit. Alternatively, the user

can monitor the STATUS_EEPROM bit directly by reading

the register.

6. When the data transfer process is done (Register 0xB00[0] =

0b), set the enable EEPROM write bit (Register 0xB02[0])

to 0b to disable writing to the EEPROM.

To verify that the data transfer has completed correctly, ensure

that Register 0xB01[0] = 0b. A value of 1b in this register indicates

a data transfer error. When an EEPROM save/load transfer is

complete, wait a minimum of 10 µs before starting the next

EEPROM save/load transfer.

READING FROM THE EEPROM

The following reset-related events can start the process of

restoring the settings stored in EEPROM to control registers.

When the EEPROM pin is set high, do any of the following:

•

Power up the AD9520.

•

Perform a hardware chip reset by pulling the RESET pin

low and then releasing RESET.

•

Set the self-clearing soft reset bit (Register 0x000[5]) to 1b.

When the EEPROM pin is set low, set the self-clearing

SOFT_EEPROM bit (Register 0xB02[1]) to 1b. The AD9520-1

then starts to read the EEPROM and loads the values into the

active registers.

If the EEPROM pin is low during reset or power-up, the

EEPROM is not active, and the AD9520-1 default values are

loaded instead.

Note that, when using the EEPROM to automatically load the

AD9520-1 register values and lock the PLL, the VCO

calibration now bit (Register 0x018[0]) must be set to 1b when

the register values are written to the EEPROM. This allows

VCO calibration to start automatically after register loading. A

valid input reference signal must be present during VCO

calibration.

To verify that the data transfer has completed correctly, verify

that Register 0xB01[0] = 0b. A value of 1b in this register indicates

a data transfer error. When an EEPROM save/load transfer is

complete, wait a minimum of 10 µs before starting the next

EEPROM save/load transfer.

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