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CS43L36 датащи(PDF) 25 Page - Cirrus Logic |
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CS43L36 датащи(HTML) 25 Page - Cirrus Logic |
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25 / 89 page ![]() DS1081F3 25 CS43L36 4.3 Class H Amplifier 4.3.2 Power-Supply Transitions Charge-pump transitions from the lower to the higher set of rail voltages occur on the next FLYN/FLYP clock cycle. Despite the system’s fast response time, the VCP_FILT pin’s capacitive elements prevent rail voltages from changing instantly. Instead, the rail voltages ramp from the lower to the higher supply, based on the time constant created by the output impedance of the charge pump and the capacitor on the VCP_FILT pin (the transition time is approximately 20 µs). Fig. 4-6 shows Class H supply switching. During this transition, a high dV/dt transient on the inputs may briefly clip the outputs before the rail voltages charge to the full higher supply level. This transitory clipping has been found to be inaudible in listening tests. Figure 4-6. VCP_FILT Transitions—Headphone Output When the charge pump transitions from the higher to the lower set of rail voltages, there is a 5.5-s delay before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis ensures that the charge pump does not toggle between the two rail voltages as signals approach the clip threshold. It also prevents clipping in the instance of repetitive high-level transients in the input signal. Fig. 4-7 shows this transitional behavior. +VCP +VCP 2 Ideal Transition Actual Transition caused by +VCP_FILT Capacitor Time +VCP 3 +2.5 V -VCP -VCP 2 -VCP 3 -2.5 V |
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