CS43L36 datasheet(79/89 Pages) CIRRUS

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DS1081F3

CS43L36

7.14 Serial Port Receive Registers

5:2

—

Reserved

1:0 ASP_RX0_

CH1_RES

ASP Receive DAI0 channel bit width. Sets output resolution of the ASP receive DAI0 channel x samples.

00 8 bits per sample (only for isochronous NFS and native modes)

01 16 bits per sample

10 24 bits per sample

11 (Default) 32 bits per sample

7.14.3 ASP Receive DAI0 Channel 1 Bit Start MSB

Address 0x2A03

R/W

—

ASP_RX0_CH1_BIT_ST_MSB

Default

000

Bits

Name

Description

7:1

—

Reserved

ASP_RX0_CH1_

BIT_ST_MSB

ASP receive DAI0 Channel 1 bit start MSB. Configures the MSB location of the channel with respect to SOF (LRCK

edge + phase lag)

7.14.4 ASP Receive DAI0 Channel 1 Bit Start LSB

Address 0x2A04

R/W

76543210

ASP_RX0_CH1_BIT_ST_LSB

Default

000000

Bits

Name

Description

7:0 ASP_RX0_CH1_

BIT_ST_LSB

ASP receive DAI0 Channel 1 bit start LSB. Configures the LSB location of the channel with respect to SOF (LRCK

edge + phase lag)

7.14.5 ASP Receive DAI0 Channel 2 Phase and Resolution

Address 0x2A05

R/W

543

—

ASP_RX0_CH2_AP

—

ASP_RX0_CH2_RES

Default

000

011

Bits

Name

Description

7—

Reserved

ASP_RX0_

CH2_AP

ASP receive DAI0 active phase. Valid only in 50/50 Mode (ASP_5050 = 1 and ASP_RX0_2FS = 0).

0 (Default) Low. In 50/50 Mode, channel data is input when LRCK/FSYNC is low.

1 High. In 50/50 Mode, channel data is input when LRCK/FSYNC is high.

5:2

—

Reserved

1:0 ASP_RX0_

CH2_RES

ASP receive DAI0 channel bit width. Sets the output resolution of the ASP receive DAI0 channel x samples.

00 8 bits per sample (valid only for isochronous NFS and native mode)

01 16 bits per sample

10 24 bits per sample

11 (Default) 32 bits per sample

7.14.6 ASP Receive DAI0 Channel 2 Bit Start MSB

Address 0x2A06

R/W

—

ASP_RX0_CH2_BIT_ST_MSB

Default

Bits

Name

Description

7:1

—

Reserved

ASP_RX0_CH2_

BIT_ST_MSB

ASP receive DAI0 Channel 2 bit start MSB. Configures the MSB location of the channel with respect to SOF (LRCK

edge + phase lag).

7.14.7 ASP Receive DAI0 Channel 2 Bit Start LSB

Address 0x2A07

R/W

765

43210

ASP_RX0_CH2_BIT_ST_LSB

Default

000000

Bits

Name

Description

7:0 ASP_RX0_CH2_

BIT_ST_LSB

ASP receive DAI0 Channel 2 bit start LSB. Configures the LSB location of the channel with respect to SOF (LRCK

edge + phase lag).

Bits

Name

Description

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