CS43L36 datasheet(73/89 Pages) CIRRUS

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DS1081F3

CS43L36

7.6 HP Load-Detect Registers

7.7 Headset Interface Registers

7.6.1

Load-Detect R/C Status

Address 0x1925

R/O

654

—

CLA_STAT

—

RLA_STAT

Default

Bits

Name

Description

7:6

—

Reserved

CLA_STAT

Capacitor load-detection result for HPA. See Section 4.2.2 for details.

Note: Low capacitance results were determined with CL = 1 nF; high capacitance results were determined with CL = 10 nF.

0 (Default) High capacitance (CL  ~2 nF)

1 Low capacitance (CL < ~2 nF)

1:0

RLA_STAT

Resistor load-detection result for HPA. See Section 4.2.2 for details.

00 (Default) 15



01 30



10 3 k



11 Reserved

7.6.2

HP Load Detect Done

Address 0x1926

R/O

76543

—

HPLOAD_DET_DONE

Default

000000

Bits

Name

Description

7:1

—

Reserved

0HPLOAD_

DET_DONE

HP load detect done. Indicates whether HP load detection is finished. See Section 4.2.2 for details.

0 (Default) HP load is not finished.

1 HP load is finished.

7.6.3

HP Load Detect Enable

Address 0x1927

R/O

654

—

HP_LD_EN

Default

Bits

Name

Description

7:1

—

Reserved

HP_LD_EN HP load detect enable. A 0-to-1 bit transition initiates load detection. See Section 4.2.2 for details.

0 (Default) Disabled

1 Enabled

7.7.1

Wake Control

Address 0x1B71

R/W

—

M_HP_WAKE

WAKEB_MODE

—

WAKEB_CLEAR

Default

000

Bits

Name

Description

7—

Reserved

6M_HP_

WAKE

Mask tip sense wake.1 Configures the mask for the tip-sense wake status.

0 Unmasked. The occurrence of a wake interrupt affects WAKE. Before unmasking, pending wake events must be cleared

via WAKEB_CLEAR.

1 (Default) Masked. The occurrence of a wake interrupt does not affect WAKE.

WAKEB_

MODE

WAKE output mode.1 Configures the mode of operation for the WAKE output

0 (Default) Output is latched low after a trigger event until WAKEB_CLEAR is toggled.

1 Output follows the combination logic directly (nonlatched).

4:1

—

Reserved

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