CS43L36 datasheet(6/89 Pages) CIRRUS

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DS1081F3

CS43L36

1.3 Pin Descriptions

AD0

AD1

I I2C Address Input. Address pins for I2C Instance ID

[1:0] input.

—

Hysteresis

on CMOS

input

Input

ASP_LRCK/

FSYNC

I/O ASP Left/Right Clock or Frame Sync. Left or right

word select, or frame start sync for the ASP interface.

—CMOS

output

Hysteresis

on CMOS

input

Input

ASP_SCLK

I ASP/ Serial Data Clock. Serial data-shift clock for

the ASP interface in I2S/TDM Mode. Source clock

used for internal master clock generation.

—

Hysteresis

on CMOS

input

Input

ASP_SDIN

I/O ASP Serial Data Input. Serial data input and output

in serial data input for the ASP interface in I2S/TDM

mode.

—CMOS

output

Hysteresis

on CMOS

input

Input

DIGLDO_PDN

I Digital LDO Power Down. Digital core logic LDO

power down.

—

Hysteresis

on CMOS

input

Input

INT

O Interrupt output. Programmable, open-drain,

active-low programmable interrupt output.

—CMOS

open-drain

output

—

Output

RESET

I Reset. Hardware reset.

—

Hysteresis

on CMOS

input

Input

SCL

I I2C Clock. Clock input for the I2C interface.

—

Hysteresis

on CMOS

input

Input

SDA

I/O I2C Input/Output. I2C input and output.

—

CMOS

open-drain

output

Hysteresis

on CMOS

input

Input

VL_SEL

I VL Supply Voltage Select. Select for VL power

supply voltage level. Connect to VP for 1.8-V VL

supply, connect to GNDD for 1.2-V VL supply

—

Hysteresis

on CMOS

input

Input

WAKE

O Wake up. Programmable, open-drain, active-low

output. This outputs the state of the Mic S0 or HP

wake detect.

—Hi-Z,

CMOS

open-drain

output

—

Output

–VCP_FILT

VCP/

VP2

O Inverting Charge Pump Filter Connection. Power

supply for the inverting charge pump that provides

the negative rail for the HP amplifier.

——

—

+VCP_FILT

VCP/

VP2

O Step Down Charge Pump Filter Connection.

Power supply for the step down charge pump that

provides the positive rail for the HP amplifier.

——

—

FLYC

VCP/

VP2

O Charge Pump Cap Common Node. Common

positive node for the HP amplifiers’ step-down and

inverting charge pumps’ flying capacitors.

——

—

FLYN

VCP/

VP2

O Charge Pump Cap Negative Node. Negative node

for the inverting charge pump’s flying capacitor.

——

—

FLYP

VCP/

VP2

O Charge Pump Cap Positive Node. Positive node for

HP amps’ step-down charge pump’s flying capacitor.

——

—

FILT+

I Positive Voltage Reference. Positive reference

voltage for internal sampling circuits.

——

—

N/A

I Analog Power Supply. Power supply for the internal

analog section.

——

—

VCP

N/A

I Charge Pump Power. Power supply for the internal

HP amplifiers charge pump.

——

—

VD_FILT

N/A

I 1.2-V Digital Core Power Supply. Power supply for

internal digital logic.

——

—

N/A

I I/O Power Supply. Power supply for external

interface and internal digital logic.

——

—

Table 1-1. Pin Descriptions (Cont.)

Pin Name

CSP

Pin #

QFN

Pin #

Power

Supply

I/O

Pin Description

Internal

Connection1

Driver

Receiver

State at

Reset

Digital I/O

Charge Pump

Power

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