CS43L36 datasheet(71/89 Pages) CIRRUS

номер детали	CS43L36

подробное описание детали	Low-Power, High-Performance Audio DAC with Class H Headphone Drivers

PDF	89 Pages

Scroll/Zoom	100%

производитель	CIRRUS [Cirrus Logic]

домашняя страница	http://www.cirrus.com

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71 / 89 page

DS1081F3

CS43L36

7.5 Fractional-N PLL Registers

7.4.15 VP Monitor Interrupt Mask

Address 0x131E

R/W

7654321

—

M_VPMON_TRIP

Default

0000000

Bits

Name

Description

7:1

—

Reserved

0M_

VPMON_

TRIP

VP monitor mask.

0 Unmasked. Unmask/enable this bit only when VP exceeds the detection voltage threshold; applicable to power-up

conditions or if VP is not at its steady-state voltage.

1 (Default) Masked

7.4.16 PLL Lock Mask

Address 0x131F

R/W

7654321

—

M_PLL_LOCK

Default

0000000

Bits

Name

Description

7:1

—

Reserved

0M_PLL_

LOCK

PLL lock mask.

0 Unmasked

1 (Default) Masked

7.4.17 Tip Sense Plug/Unplug Interrupt Mask

Address 0x1320

R/W

765

43210

—

M_TS_UNPLUG

M_TS_PLUG

—

Default

001111

Bits

Name

Description

7:4

—

Reserved

3M_TS_

UNPLUG

Tip sense unplug mask.

0 Unmasked

1 (Default) Masked

2M_TS_

PLUG

Tip sense plug mask.

0 Unmasked

1 (Default) Masked

1:0

—

Reserved

7.5.1

PLL Control 1

Address 0x1501

R/W

76543210

—

PLL_START

Default

000000

Bits

Name

Description

7:1

—

Reserved

PLL_

START

PLL start. If MCLK_SRC_SEL = 0, the PLL is bypassed and can be powered down by clearing PLL_START. See Section 4.4.3.

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