RM0319 datasheet(235/368 Pages) STMICROELECTRONICS

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RM0319

I2C bus ports (I2C)

Doc ID 022640 Rev 3

235/368

Table 67.

I2C controller interrupt sources

Name

Source

GEN_CALL

General call request received.

Indicates that a general call request was received (refer to Section 17.3.2:

I2C protocols on page 226). The I2C controller stores the received data in

the Receive buffer.

START_DET

START condition occurred.

Indicates that a START condition has occurred on the I2C interface (refer to

Section 17.3.2: I2C protocols on page 226).

STOP_DET

STOP condition occurred.

Indicates that a STOP condition has occurred on the I2C interface (refer to

Section 17.3.2: I2C protocols on page 226).

ACTIVITY

Capture system activity.

This bit captures I2C controller activity and it remains set until it is cleared,

regardless of the I2C controller going idle.

RX_DONE

Indicates transmission done.

This bit is set to 1‘b1 if the master does not acknowledge a transmitted

byte, while I2C controller is acting as a slave-transmitter. This occurs on the

last byte of the transmission, indicating that the transmission is done.

TX_ABRT

Indicates transmission abort.

This bit is set to ‘b1 when the I2C controller, acting as a master, is unable to

complete a command that the processor has sent. Several conditions could

cause this interrupt to be issued:

– no slave acknowledge after the address is sent,

– the address slave does not acknowledge a byte of data,

– arbitration is lost,

– attempting to send a master command when configured only to be slave,

– IC_RESTART_EN bit in the IC_CON register is set to ‘b0 (restart

condition disabled), and the processor attempts to issue an I2C function

that is impossible to perform without using restart conditions,

– high-speed master code is acknowledged,

– start byte is acknowledged,

– general call address is not acknowledged,

– when a read request interrupt occurs and the processor has previously

placed the data in transmit buffer that has not been transmitted yet. This

data could have been intended to service a multibyte RD_REQ that

ended up having fewer numbers of byte requested. Or, if

IC_RESTART_EN is disabled and the I2C loses control of the bus

between transfers and is then accessed as a slave-transmitter,

– if a read command is issued after a general call command has been

issued. Disabling the I2C reverts it back to normal operation,

– if the processor attempts to issue read command before a RD_REQ is

serviced.

Anytime this bit is set, the contents of both transmit and receive buffers are

flushed.

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