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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RM0319 датащи(PDF) 94 Page - STMicroelectronics |
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RM0319 датащи(HTML) 94 Page - STMicroelectronics |
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94 / 368 page  Serial NOR Flash controller (SMI) RM0319 94/368 Doc ID 022640 Rev 3 7.3 Functional description Figure 21 shows the block diagram of SMI. SMI consists of two main interfaces: ● The clock prescaler (Section 7.3.1) ● The data processing and control (Section 7.3.2) Figure 21. SMI block diagram 7.3.1 Clock prescaler The SMI clock prescaler block allows to set up the memory clock SMI_CLK using the AHB clock HCLK, as detailed in Section 7.4. 7.3.2 Data processing and control The SMI data processing and control block represents the logic controlling the transfer of data between SPI-compatible off-chip memory and AHB bus. Transfer rules through both AHB-to-SMI and SMI-to-memory interfaces. The different data transfer modes between SPI- compatible off-chip memory and AHB bus are detailed in Section 7.3.4. SMI Clock Prescaler (1 to 127) Data, command Bank select Transmit Register Receive Register/ Status Regsiter Control and Status Register AHB Slave Interface SMI Data processing and Control Clock SPI- Compatible Memories Data, Status |
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