PIC18F23K22-ESLASHML datasheet(185/496 Pages) MICROCHIP

185 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 185

PIC18(L)F2X/4XK22

Configure and start the 8-bit TimerX resource:

• Clear the TMRxIF interrupt flag bit of the

PIR2 or PIR4 register. See Note 1 below.

• Configure the TxCKPS bits of the TxCON

• Enable the Timer by setting the TMRxON

bit of the TxCON register.

Enable PWM output pin:

• Wait until the Timer overflows and the

TMRxIF bit of the PIR2 or PIR4 register is

set. See Note 1 below.

• Enable the CCPx pin output driver by

clearing the associated TRIS bit.

14.3.3

PWM TIMER RESOURCE

The PWM standard mode makes use of one of the 8-bit

Timer2/4/6 timer resources to specify the PWM period.

Configuring the CxTSEL<1:0> bits in the CCPTMRS0

or CCPTMRS1 register selects which Timer2/4/6 timer

is used.

14.3.4

PWM PERIOD

The PWM period is specified by the PRx register of 8-bit

TimerX. The PWM period can be calculated using the

formula of Equation 14-1.

EQUATION 14-1:

PWM PERIOD

When TMRx is equal to PRx, the following three events

occur on the next increment cycle:

• TMRx is cleared

• The CCPx pin is set. (Exception: If the PWM duty

cycle = 0%, the pin will not be set.)

• The PWM duty cycle is latched from CCPRxL into

CCPRxH.

14.3.5

PWM DUTY CYCLE

The PWM duty cycle is specified by writing a 10-bit

value to multiple registers: CCPRxL register and

DCxB<1:0> bits of the CCPxCON register. The

CCPRxL contains the eight MSbs and the DCxB<1:0>

bits of the CCPxCON register contain the two LSbs.

CCPRxL and DCxB<1:0> bits of the CCPxCON

value is not latched into CCPRxH until after the period

completes (i.e., a match between PRx and TMRx

registers occurs). While using the PWM, the CCPRxH

Equation 14-2 is used to calculate the PWM pulse

width.

Equation 14-3 is used to calculate the PWM duty cycle

ratio.

EQUATION 14-2:

PULSE WIDTH

EQUATION 14-3:

DUTY CYCLE RATIO

The CCPRxH register and a 2-bit internal latch are

used to double buffer the PWM duty cycle. This double

buffering is essential for glitchless PWM operation.

The 8-bit timer TMRx register is concatenated with either

the 2-bit internal system clock (FOSC), or 2 bits of the

prescaler, to create the 10-bit time base. The system

clock is used if the TimerX prescaler is set to 1:1.

When the 10-bit time base matches the CCPRxH and

2-bit latch, then the CCPx pin is cleared (see

Figure 14-4).

Note 1: In order to send a complete duty cycle

and period on the first PWM output, the

above steps must be included in the

setup sequence. If it is not critical to start

with a complete PWM signal on the first

output, then step 6 may be ignored.

Note:

The Timer postscaler (see Section 13.0

“Timer2/4/6 Module”) is not used in the

determination of the PWM frequency.

PWM Period

PRx

 1

 4TOSC 



(TMRx Prescale Value)

Note 1: TOSC = 1/FOSC

Pulse Width

CCPRxL:CCPxCON<5:4>





TOSC

 (TMRx Prescale Value)

Duty Cycle Ratio

CCPRxL:CCPxCON<5:4>



4 PRx



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