PIC18F23K22-ESLASHML datasheet(163/496 Pages) MICROCHIP

163 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 163

PIC18(L)F2X/4XK22

12.3

Timer1/3/5 Prescaler

Timer1/3/5 has four prescaler options allowing 1, 2, 4 or

8 divisions of the clock input. The TxCKPS bits of the

TxCON register control the prescale counter. The

prescale counter is not directly readable or writable;

however, the prescaler counter is cleared upon a write to

TMRxH or TMRxL.

12.4

Secondary Oscillator

dedicated

secondary

low-power

32.768 kHz

oscillator circuit is built-in between pins SOSCI (input)

and SOSCO (amplifier output). This internal circuit is to

be used in conjunction with an external 32.768 kHz

crystal.

The oscillator circuit is enabled by setting the

TxSOSCEN bit of the TxCON register, the SOSCGO bit

of the OSCCON2 register or by selecting the

secondary oscillator as the system clock by setting

SCS<1:0> = 01 in the OSCCON register. The oscillator

will continue to run during Sleep.

12.5

Timer1/3/5 Operation in

Asynchronous Counter Mode

If control bit TxSYNC of the TxCON register is set, the

external clock input is not synchronized. The timer

increments asynchronously to the internal phase

clocks. If external clock source is selected then the

timer will continue to run during Sleep and can

generate an interrupt on overflow, which will wake-up

the processor. However, special precautions in

software are needed to read/write the timer (see

Section 12.5.1 “Reading and Writing Timer1/3/5 in

Asynchronous Counter Mode”).

12.5.1

READING AND WRITING

TIMER1/3/5 IN ASYNCHRONOUS

COUNTER MODE

Reading TMRxH or TMRxL while the timer is running

from an external asynchronous clock will ensure a valid

read (taken care of in hardware). However, the user

should keep in mind that reading the 16-bit timer in two

8-bit values itself, poses certain problems, since the

timer may overflow between the reads. For writes, it is

recommended that the user simply stop the timer and

write the desired values. A write contention may occur

by writing to the timer registers, while the register is

incrementing. This may produce an unpredictable

value in the TMRxH:TMRxL register pair.

12.6

Timer1/3/5 16-Bit Read/Write Mode

Timer1/3/5 can be configured to read and write all 16

bits of data, to and from, the 8-bit TMRxL and TMRxH

registers, simultaneously. The 16-bit read and write

operations are enabled by setting the RD16 bit of the

TxCON register.

To accomplish this function, the TMRxH register value

is mapped to a buffer register called the TMRxH buffer

not directly readable or writable and all read and write

operations take place through the use of this TMRxH

buffer register.

When a read from the TMRxL register is requested, the

value of the TMRxH register is simultaneously loaded

into the TMRxH buffer register. When a read from the

TMRxH register is requested, the value is provided

from the TMRxH buffer register instead. This provides

the user with the ability to accurately read all 16 bits of

the Timer1/3/5 value from a single instance in time.

In contrast, when not in 16-Bit mode, the user must

read each register separately and determine if the

values have become invalid due to a rollover that may

have occurred between the read operations.

When a write request of the TMRxL register is

requested, the TMRxH buffer register is simultaneously

updated with the contents of the TMRxH register. The

value of TMRxH must be preloaded into the TMRxH

buffer register prior to the write request for the TMRxL

all 16 bits to the TMRxL:TMRxH register pair at the

same time.

Any requests to write to the TMRxH directly does not

clear the Timer1/3/5 prescaler value. The prescaler

value is only cleared through write requests to the

TMRxL register.

Note:

The oscillator requires a start-up and

stabilization time before use. Thus,

TxSOSCEN should be set and a suitable

delay

observed

prior

enabling

Timer1/3/5.

Note:

When switching from synchronous to

asynchronous operation, it is possible to

skip an increment. When switching from

asynchronous to synchronous operation,

it is possible to produce an additional

increment.

PIC18F23K22-E/ML датащи(PDF) 163 Page - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 163 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL