PIC18F23K22-ESLASHML datasheet(150/496 Pages) MICROCHIP

150 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 150

Preliminary

 2010 Microchip Technology Inc.

TABLE 10-14: PORTE I/O SUMMARY

Function

TRIS

Setting

ANSEL

Setting

Type

Buffer

Type

Description

RE0/P3A/CCP3/AN5

RE0

DIG

LATE<0> data output; not affected by analog input.

PORTE<0> data input; disabled when analog input

enabled.

P3A(1)

DIG

Enhanced CCP3 PWM output.

CCP3(1)

ODIG

Compare 3 output/PWM 3 output.

IST

Capture 3 input.

AN5

Analog input 5.

RE1/P3B/AN6

RE1

DIG

LATE<1> data output; not affected by analog input.

PORTE<1> data input; disabled when analog input

enabled.

P3B

DIG

Enhanced CCP3 PWM output.

AN6

Analog input 6.

RE2/CCP5/AN7

RE2

DIG

LATE<2> data output; not affected by analog input.

PORTE<2> data input; disabled when analog input

enabled.

CCP5

DIG

Compare 5 output/PWM 5 output.

Capture 5 input.

AN7

Analog input 7.

RE3/VPP/MCLR

RE3

—

PORTE<3> data input; enabled when Configuration bit

MCLRE = 0.

VPP

—

Programming voltage input; always available

MCLR

——

Active-low Master Clear (device Reset) input; enabled

when configuration bit MCLRE = 1.

Legend:

AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS

= CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I2CTM = Schmitt Trigger input with I2C.

Note 1:

Alternate pin assignment for P3A/CCP3 when Configuration bit CCP3MX is clear..

TABLE 10-15: REGISTERS ASSOCIATED WITH PORTE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

on page

ANSELE(1)

—

ANSE2

ANSE1

ANSE0

154

INTCON2

RBPU

INTEDG0 INTEDG1 INTEDG2

—

TMR0IP

—

RBIP

116

LATE(1)

—

LATE2

LATE1

LATE0

155

PORTE

—

—RE3

RE2(1)

RE1(1)

RE0(1)

152

SLRCON

—

—SLRE(1)

SLRD(1)

SLRC

SLRB

SLRA

156

TRISE

WPUE3

—

TRISE2(1) TRISE1(1) TRISE0(1)

154

Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTE.

Note 1:

Available on PIC18(L)F4XK22 devices.

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