MAC7200 datasheet(122/976 Pages) FREESCALE

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Detailed Signal Descriptions

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

4.3.24

PB[13] / SCK_B / NEX1MDO — Port B I/O Pin, DSPI_B and Nexus

Primary

PB[13] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide

either an open drain or push-pull pad. The pin can be configured as serial clock pin SCK of the Serial

Peripheral Interface B (DSPI_B). It can be configured to wake the system out of low-power mode (DOZE)

when an external signal is applied using the interrupt functionality. When the Nexus Primary Port is

selected and active, this pin is used as a Message Data Out output.

4.3.25

PB[14] / SOUT_B / NEX1MDO — Port B I/O Pin, DSPI_B and Nexus

Primary

PB[14] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide

either an open drain or push-pull pad. The pin can be configured as the output pin of the Serial Peripheral

Interface B (DSPI_B). It can be configured to wake the system out of low-power mode (DOZE) when an

external signal is applied using the interrupt functionality. When the Nexus Primary Port is selected and

active, this pin is used as a Message Data Out output.

4.3.26

PB[15] / SIN_B / NEX1MDO — Port B I/O Pin, DSPI_B and Nexus

Primary

PB[15] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide

either an open drain or push-pull pad. The pin can be configured as the input pin of the Serial Peripheral

Interface B (DSPI_B). It can be configured to wake the system out of low-power mode (DOZE) when an

external signal is applied using the interrupt functionality. When the Nexus Primary Port is selected and

active, this pin is used as a Message Data Out output.

4.3.27

PC[0:2] / ADDR[0:2] — Port C I/O Pins and External address bus

PC[0] to PC[2] are configurable general purpose input or output pins. The pins can be independently

configured to provide either high or reduced output drive, and also to enable or disable either a pull-up or

pull-down resistor on the pin. The pin is multiplexed with the external address bus lines Address 0 to

Address 2. Each pin can be independently configured to wake the system out of low-power mode (DOZE)

when an external signal is applied using the interrupt functionality.

4.3.28

PC[3] / ADDR[3] / NEX2EVTI — Port C I/O Pins, External Address Bus

and Nexus Secondary

PC[3] is a configurable general purpose input or output pin. It can be independently configured to provide

either high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistor on

the pin. The pin is multiplexed with the external address bus line Address 3. Each pin can be independently

configured to wake the system out of low-power mode (DOZE) when an external signal is applied using

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