MAC7200 datasheet(25/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

xxv

Chapter 26

Periodic Interrupt Timer (PIT_RTI)

26.1

Introduction......................................................................................................................461

26.1.1

Overview......................................................................................................................461

26.1.2

Block Diagram.............................................................................................................461

26.2

PIT Features .....................................................................................................................462

26.2.1

Modes of Operation .....................................................................................................463

26.3

PIT Implementation .........................................................................................................463

26.4

PIT External Pins .............................................................................................................463

26.5

PIT Bus Aborts ................................................................................................................463

26.6

PIT Differences from MAC71xx .....................................................................................464

26.7

PIT Application Usage.....................................................................................................464

26.7.1

Enabling the PIT ..........................................................................................................464

26.7.2

SYSTRIG Order ..........................................................................................................464

26.7.3

Interrupts......................................................................................................................464

26.8

Memory Map and Register Description...........................................................................464

26.8.1

Memory Map ...............................................................................................................465

26.8.2

Register Descriptions...................................................................................................466

26.8.2.1

PIT RTI / Timer Load Value Register (TLVAL)......................................................466

26.8.2.2

PIT Current RTI / Timer Values (TVAL0–10).........................................................468

26.8.2.3

Interrupt Flags Register (PITFLG) ..........................................................................470

26.8.2.4

PIT Interrupt Enable Register (PITINTEN) ............................................................471

26.8.2.5

PIT Interrupt/DMA Select Registers (PITINTSEL)................................................472

26.8.2.6

PIT Timer Enable Register (PITEN) .......................................................................473

26.8.2.7

PIT Control Register (PITCTRL)............................................................................474

26.9

Functional Description.....................................................................................................476

26.9.1

General.........................................................................................................................476

26.9.1.1

Timer / RTI ..............................................................................................................476

26.9.1.2

Debug Mode ............................................................................................................477

26.9.2

Interrupts......................................................................................................................477

26.9.2.1

Real Time Interrupt..................................................................................................477

26.9.2.2

Timer Interrupts .......................................................................................................477

26.10

Initialization and Application Information ......................................................................478

26.10.1

Example Configuration................................................................................................478

Chapter 27

Enhanced Direct Memory Access (DMA Channel MUX)

27.1

Introduction......................................................................................................................481

27.1.1

Features........................................................................................................................482

27.1.2

Modes of Operation .....................................................................................................482

27.2

External Signal Description .............................................................................................482

27.3

Memory Map and Register Definition.............................................................................483

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