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MAC7200 датащи(PDF) 80 Page - Freescale Semiconductor, Inc |
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MAC7200 датащи(HTML) 80 Page - Freescale Semiconductor, Inc |
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80 / 976 page ![]() Features MAC7200 Microcontroller Family Reference Manual, Rev. 2 2 Freescale Semiconductor — Byte (8-bit), Halfword (16-bit), Word (32-bit) data types supported. — Cores and Memory connected using high performance AMBA AHB bus. — Integrated E-ICE module for debug • Memory size — 320k Bytes (MAC72x2) or 512k Bytes (MAC72x1) of wide accessed Program Flash EEPROM. – 4 Flash page buffers all 128-bits wide and individually configurable as either Instruction or Data buffers. – Page buffers can be configured to enable fetch ahead and either least recently used or counter based buffer replacement schemes. – Program & erase operations controlled by state machine. – Internally generated program and erase voltages. – ECC enabled array with 2-bit error detection, 1-bit error correction providing transparent operation. – 64-bit minimum write size. – Flash configuration suitable for EEPROM emulation. – Read or Program/Erase access on flash partition basis. – Flash BIU support for access protection for User/Supervisor mode and Instruction/Data accesses. – Protection violation flag. – Flash Lockout recovery mechanism though JTAG interface. – 100K W/E endurance. – 20 year data retention. — 20k Byte (MAC72x2) or 32k Bytes (MAC72x1) RAM – Single cycle accesses to RAM for Byte, Halfword and Word reads and writes. – ECC enabled array with 2-bit error detection, 1-bit error correction. • Interrupt Controller — 64 vectored interrupt sources. — Interrupt sources available from internal peripherals, eDMA controller, software watchdog timer and external sources. — Supports 16 interrupt levels (0-15) with 64 priorities per level (1-64), to allow maximum flexibility in configuring the system. Every interrupt source can be programmed to any interrupt level. Priorities within a level are hard-coded in the MCU. — Multiple level interrupt nesting. — Hardware support for first nesting level. — Normal and Fast interrupts supported with software programmability of sources for both Fast and Normal Interrupts • Enhanced Direct Memory Access Controller (eDMA) |
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