7220 datasheet(25/303 Pages) RENESAS

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1-7

7220 Group User’s Manual

Power source

CNVSS

Reset input

Clock input

Clock output

I/O port P0

PWM output

External

interrupt input

Analog input

I/O port P1

CRT output

Multi-master

I2C-BUS

interface

Analog input

External

interrupt input

Input

Output

I/O

Output

Input

I/O

Output

I/O

Input

Apply voltage of 5 V ± 10 % (typical) to VCC, and 0 V to VSS.

Connected to VSS.

To enter the reset state, the reset input pin must be kept at a “L” for

µs or more (under normal VCC conditions).

If more time is needed for the quartz-crystal oscillator to stabilize, this

“L” condition should be maintained for the required time.

This chip has an internal clock generating circuit. To control generating

frequency, an external ceramic resonator or a quartz-crystal oscillator

is connected between pins XIN and XOUT. If an external clock is used,

the clock source should be connected to the XIN pin and the XOUT pin

should be left open.

Port P0 is an 8-bit I/O port with direction register allowing each I/O bit

to be individually programmed as input or output. At reset, this port is

set to input mode. The output structure is N-channel open-drain output.

Pins P00–P05 are also used as PWM output pins PWM0–PWM5

respectively. The output structure is N-channel open-drain output.

Pins P06 , P07 are also used as external interrupt input pins INT2,

INT1 respectively.

P06 pin is also used as analog input pin A-D4.

Port P1 is an 8-bit I/O port and has basically the same functions as

port P0. The output structure is CMOS output.

Pins P10 is also used as CRT output pin OUT2. The output structure

is CMOS output.

Pins P11–P14 are used as SCL1, SCL2, SDA1 and SDA2 respectively,

when multi-master I2C-BUS interface is used. The output structure is

N-channel open-drain output.

Pins P15–P17 are also used as analog input pins A-D1 to A-D3

respectively.

P15 pin is also used as external interrupt input pin INT3.

VCC,

VSS

CNVSS

______

RESET

XIN

XOUT

P00

PWM0–

P05/

PWM5,

P0 6/INT2/

A-D4,

P07/INT1

P10/OUT2,

P11/SCL1,

P12/SCL2,

P13/SDA1,

P14/SDA2,

P15/A-D1/

INT3,

P16/A-D2,

P17/A-D3

1.3 Pin description

The pin description is shown in Table 1.3.1.

M37220M3-XXXSP/FP

Refer to “CHAPTER 4. M37220M3-XXXSP/FP.”

Table 1.3.1 Pin description (1)

Name

Input/

Output

Functions

OVERVIEW

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