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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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7220 датащи(PDF) 60 Page - Renesas Technology Corp |
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7220 датащи(HTML) 60 Page - Renesas Technology Corp |
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60 / 303 page  2-33 7220 Group User’s Manual FUNCTIONAL DESCRIPTION 2.5 Interrupts FFF016 FFF116 FFF216 FFF316 FFF416 FFF516 FFF616 FFF716 FFF816 FFF916 FFFA16 FFFB16 FFFC16 FFFD16 FFFE16 FFFF16 H L H L H L H L H L H L H L VSYNC interrupt f(XIN)/4096 interrupt Timer 4 interrupt INT1 interrupt INT2 interrupt CRT interrupt Reset Interrupt Vector Table FFDE16 FFDF16 FFE016 FFE516 FFE816 FFE916 FFEA16 FFEB16 FFEC16 FFED16 FFEE16 FFEF16 H L H L H L H L H L BRK instruction interrupt Internal ROM area Serial I/O interrupt Timer 1 interrupt Timer 3 interrupt Timer 2 interrupt Internal ROM area Internal ROM area The low-order 8 bits and the high-order 8 bits of jump destination address when an interrupt occurs, are stored to addresses “L” and “H” respectively. FFE416 H L INT3 interrupt FFE616 FFE716 H L Multi-master I C-BUS interface interrupt 2 Interrupt request bits are set to “1” by occurrence of an interrupt request, even if the interrupt is disabled. Therefore, to disable interrupt processing, clear the interrupt request bit to “0” immediately before the interrupt disable state is cancelled (interrupt enable state, i.e., the interrupt enable bit = “1” and the interrupt disable flag = “0”). TM4E TM1E IT2E TM3E IT1E VSCE MSE S1E TM2E Reset CRTE RESET Interrupt request bit Interrupt enable bit Interrupt disable flag (I) Interrupt vector CRTR TM4R TM1R IT2R TM3R IT1R VSCR MSR S1R TM2R FFE916, FFE816 FFEB16, FFEA16 FFED16, FFEC16 FFEF16, FFEE16 FFF116, FFF016 FFF316, FFF216 FFF516, FFF416 FFF916, FFF816 FFFB16, FFFA16 FFFD16, FFFC16 FFFF16, FFFE16 FFDF16, FFDE16 BRK Note: indicates to operate together. IICE IT3E IICR IT3R FFE516, FFE416 FFE716, FFE616 CRT interrupt INT2 interrupt INT1 interrupt Timer 4 interrupt f(XIN)/4096 interrupt VSYNC interrupt Timer 3 interrupt Timer 2 interrupt Timer 1 interrupt Serial I/O interrupt Multi-master I2C-BUS interface interrupt INT3 interrupt BRK instruction interrupt Fig. 2.5.10 Interrupt vector table Fig. 2.5.9 Interrupt control system |
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