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7220 датащи(PDF) 72 Page - Renesas Technology Corp |
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7220 датащи(HTML) 72 Page - Renesas Technology Corp |
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72 / 303 page ![]() 2-45 7220 Group User’s Manual FUNCTIONAL DESCRIPTION 2.7 Serial I/O Fig. 2.7.6 Timing diagram of serial I/O 2.7.7 Note when selecting a synchronous clock Regardless of either an internal or external clock is selected as the serial I/O synchronous clock source, the interrupt request bit is set to “1” after 8 transfer clocks. However, the serial I/O register contents will continue to be shifted as long as the transfer clock is being input to the serial I/O circuit, so it is necessary to stop after 8 transfer clocks. When an internal clock is selected, the transfer clock stops automatically after 8 clocks. When an external clock is selected, control the transfer clock externally. Moreover, use an external clock of 1 MHz or less with a duty cycle of 50 %. When selecting an external clock as the synchronizing clock, write transmit data to the serial I/O register transfer clock input level is HIGH Figure 2.7.6 shows the serial I/O timing. D0 Synchronous clock Transfer clock Serial I/O register writing signal Serial I/O output SOUT Serial I/O input SIN Interrupt request bit is set to “1” D1 D2 D3 D4 D5 D6 D7 Note: When an internal clock is selected, pin SOUT is at high-impedance after transfer is completed. |
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