7220 datasheet(87/303 Pages) RENESAS

87 / 303 page

2-60

7220 Group User’s Manual

FUNCTIONAL DESCRIPTION

2.8 Multi-master I2C-BUS interface

(4)

Address Data Communication

There are two address data communication formats, namely, 7-bit addressing format and 10-bit

addressing format. The respective address communication formats is described below.

7-bit addressing format

To meet the 7-bit addressing format, set the 10BIT SAD bit of the I2C control register (address

00DA16) to “0.” The first 7-bit address data transmitted from the master is compared with the high-

order 7-bit slave address stored in the I2C address register (address 00D816). At the time of this

comparison, address comparison of the RBW bit of the I2C address register (address 00D816) is not

made. For the data transmission format when the 7-bit addressing format is selected, refer to

“Figure 2.8.12, (1) and (2).”

10-bit addressing format

To meet the 10-bit addressing format, set the 10BIT SAD bit of the I2C control register (address

00DA16) to “1.” An address comparison is made between the first-byte address data transmitted

from the master and the 7-bit slave address stored in the I2C address register (address 00D816).

At the time of this comparison, an address comparison between the RBW bit of the I2C address

the master is made. In the 10-bit addressing mode, the R/W bit which is the last bit of the address

data not only specifies the direction of communication for control data but also is processed as an

address data bit.

When the first-byte address data matches the slave address, the AAS bit of the I2C status register

(address 00D916) is set to “1.” After the second-byte address data is stored into the I2C data shift

slave address by software. When the address data of the 2nd byte matches the slave address, set

the RBW bit of the I2C address register (address 00D816) to “1” by software. This processing can

match the 7-bit slave address and R/W data, which are received after a RESTART condition is

detected, with the value of the I2C address register (address 00D816). For the data transmission

format when the 10-bit addressing format is selected, refer to “Figure 2.8.12, (3) and (4).”

Slave address

Data

A/A

R/W

7 bits

“0”

1 to 8 bits

Slave address

Data

7 bits

“1”

1 to 8 bits

(1) A master-transmitter transmits data to a slave-receiver

Slave address

1st 7 bits

Data

7 bits

“0”

8 bits

1 to 8 bits

(2) A master-receiver receives data from a slave-transmitter

Slave address

2nd byte

Data

A/A

1 to 8 bits

Slave address

1st 7 bits

7 bits

“0”

8 bits

7 bits

(3) A master-transmitter transmits data to a slave-receiver with a 10-bit address

Slave address

2nd byte

Data

1 to 8 bits

Slave address

1st 7 bits

Data

1 to 8 bits

“1”

(4) A master-receiver receives data from a slave-transmitter with a 10-bit address

From master to slave

From slave to master

R/W

Fig. 2.8.12 Address data communication format

: START condition

: ACK bit

: Restart condition

P : STOP condition

R/W: Read/Write bit

7220 датащи(PDF) 87 Page - Renesas Technology Corp

7220 датащи(HTML) 87 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL