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7220 датащи(PDF) 34 Page - Renesas Technology Corp

номер детали 7220
подробное описание детали  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  303 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7220 датащи(HTML) 34 Page - Renesas Technology Corp

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2-7
7220 Group User’s Manual
FUNCTIONAL DESCRIPTION
2.1 Central processing unit
74
0
1
=B Flag
PS (processor status register)
PCH (high-order of program counter)
PCL (low-order of program counter)
Bit
S
S+1
S+2
S+3
Fig. 2.1.4 Contents of stack after execution of BRK instruction
(6)
X modified operation mode flag (T) .............. Bit 5
This flag determines whether arithmetic operations are performed via the accumulator or directly
between memories. When the flag is set to “0”, arithmetic operations are performed between the
accumulator and memory. When “1,” arithmetic operations are performed directly between memories.
This flag is set to “1” with the SET instruction and is cleared to “0” with the CLT instruction.
Since this flag directly affects calculations, always initialize it after a reset.
s When the T flag = “0”
A
←A V M
V : indicates an arithmetic operation
A : accumulator contents
M: contents of the memory specified by the addressing of the arithmetic operation
s When the T flag = “1”
M1
←M1 V M2
V : indicates arithmetic operation
M1: contents of memory specified directly with index register X
M2: contents of the memory specified by the addressing of the arithmetic operation
(7)
Overflow flag V ................................................... Bit 6
This flag is set to “1” when an overflow occurs in the result of an arithmetic operation involving signs.
An overflow occurs when the result of an addition or subtraction exceeds +127 (7F16) or –128 (8016).
The CLV instruction clears the overflow flag to “0.” There is no instruction for setting this flag to “1.”
When the BIT instruction is executed except the above, bit 6 of the memory executed by the BIT
instruction is set to the overflow flag.
This flag has no meaning in decimal mode.
Note: Overflows do not occur when the result of an addition or subtraction is smaller than the above
numerical values or an addition is performed between different signs.
(8)
Negative flag (N) ......................................................... Bit 7
This flag is set to “1” when the result of a data transfer or arithmetic operation is negative (bit 7 is
“1”). When the BIT instruction is executed, bit 7 of the memory executed by the BIT instruction is
set to the negative flag. This flag can be used to determine whether the results of arithmetic operations
are positive or negative, and also to perform a simple bit test. There are no instructions for directly
setting or clearing this flag.
This flag has no meaning in decimal mode.



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