SH7713 datasheet(112/904 Pages) RENESAS

номер детали	SH7713

подробное описание детали	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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производитель	RENESAS [Renesas Technology Corp]

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Section 3 DSP Operating Unit

Rev.1.50 Aug. 30, 2006 Page 72 of 860

REJ09B0288-0150

instruction fields consist of two fields: field A and field B. In field A, a function for double data

transfer instructions can be descried. In field B, ALU operation instructions and multiply

instructions can be described. The instructions described in fields A and B can be executed in

parallel. A maximum of four instructions (ALU operation, multiply, and two data transfers) can be

executed in parallel. For details, refer to section 3.5, DSP Data Operation Instructions.

Notes: 1. 32-bit instruction codes are handled as two consecutive 16-bit instruction codes.

Accordingly, 32-bit instruction codes can be assigned to a word boundary. 32-bit

instruction codes must be stored in memory, upper word and lower word, in this order,

in word units.

2. In little endian, the upper and lower words must be stored in memory as data to be

accessed in word units.

CPU core instruction

0000

1110

111100

111101

111110

A Field

B Field

12 11

26 25

Double-data transfer instruction

Single-data transfer instruction

DSP data operation instruction

Figure 3.1 DSP Instruction Format

SH7713 датащи(PDF) 112 Page - Renesas Technology Corp