M16CSLASH1N datasheet(186/238 Pages) RENESAS

186 / 238 page

Rev.1.00

Oct 20, 2004

page 174 of 222

M16C/1N Group

19. Flash Memory Version

REJ09B0007-0100Z

19.2 Flash Memory

The ROM in the flash memory version is separated between a user ROM area and a boot ROM area.

Figure 19.1 shows the block diagram of flash memory. The user ROM area has 2K-byte block A and B, in

addition to the area that stores a program for microcomputer operation during singe-chip mode.

The user ROM area is divided into several blocks. The user ROM area can be rewritten in all of CPU

rewrite, standard serial I/O, parallel I/O and CAN I/O modes. Block 0 and 1 can be rewritten by setting

FMR0 register's FMR02 bit to "1" and the FMR1 register's FMR16 bit to "1" in CPU rewrite mode only.

Block 2 and 3 can be rewriting by setting the FMR 1 register's FMR 16 bit to "1". Block A and B are

enabled for use by setting the PM1 register's PM10 bit to "1".

The boot ROM area is reserved area. A rewrite control program for standard serial I/O and CAN I/O

modes is written into the boot ROM area when the device is shipped from the factory. The boot ROM area

can be rewritten in parallel I/O mode.

Figure 19.1 Block diagram of flash memory

4K bytes (Note 4)

0FFFFF16

Boot ROM area (Reserved area)

0F000016

Block 0 : 8K bytes (Note 3)

Block 1 : 8K bytes (Note 3)

00FFFF16

Block A : 2K bytes (Note 2)

0FFFFF16

00F00016

0FF00016

User ROM area (Note 1)

Data ROM area

Block B : 2K bytes (Note 2)

Block 3 : 32K bytes (Note 5)

Block 2 : 16K bytes (Note 5)

0F7FFF16

0F800016

0FBFFF16

0FC00016

0FDFFF16

0FE00016

Note 1: To specify a block, use an even address in that block.

Note 2: Block A and B can be mode usable by setting the PM1 register’s PM10 bit to "1".

Note 3: Block 0 and 1 can be rewritten by setting FMR0 register’s FMR02 bit to "1" and the FMR

1 register’s FMR16 bit to "1" in CPU rewrite mode only. Block 2 and 3 can be rewriting

by setting the FMR1 register’s FMR16 bit to "1".

Note 4: The boot ROM area is reserved area. This area can be rewritten in parallel I/O mode.

Note 5: Block 2 and 3 can be rewriting by setting the FMR1 register’s FMR16 bit to "1" (in CPU

rewrite mode only).

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