M16CSLASH1N datasheet(167/238 Pages) RENESAS

167 / 238 page

Rev.1.00

Oct 20, 2004

page 155 of 222

M16C/1N Group

17. Programmable I/O Ports

REJ09B0007-0100Z

17. Programmable I/O Ports

17.1 Description

There are 37 programmable I/O ports: P0 to P5. Each port can be set independently for input or output

using the direction register. A pull-up resistance for each block of 4 ports can be set. The port P1 allows

the drive capacity of its N-channel output transistor to be set as necessary. The port P1 can be used as

LED drive port if the drive capacity is set to "HIGH".

Figures 17.1 to 17.4 show the programmable I/O ports.

Each pin functions as a programmable I/O port and as the I/O for the built-in peripheral devices.

To use the pins as the inputs for the built-in peripheral devices, set the direction register of each pin to

input mode. When the pins are used as the outputs for the built-in peripheral devices (other than the D/A

converter), they function as outputs regardless of the contents of the direction registers. When a pin is to

be used as the output for the D/A converter, do not set the direction register to output mode. See the

descriptions of the respective functions for how to set up the built-in peripheral devices.

17.1.1 Direction registers

Figure 17.5 shows the direction registers.

These registers are used to choose the direction of the programmable I/O ports. Each bit in these

registers corresponds one for one to each I/O pin.

17.1.2 Port registers

Figure 17.6 shows the port registers.

These registers are used to write and read data for input and output to and from an external device. A

port register consists of a port latch to hold output data and a circuit to read the status of a pin. Each bit

in port registers corresponds one for one to each I/O pin.

17.1.3 Pull-up control registers

Figure 17.7 shows the pull-up control registers.

The pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. When

ports are set to have a pull-up resistance, the pull-up resistance is connected only when the direction

17.1.4 Port P1 drive capacity control register

Figure 17.7 shows a structure of the port P1 drive capacity control register.

This register is used to control the drive capacity of the port P1's N-channel output transistor. Each bit

in this register corresponds one for one to the port pins.

17.1.5 CAN0 I/O port selected register

Figure 17.8 shows the CAN0 I/O port selected register.

This register is used to select I/O port for CAN0.

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