TMP93CS44 datasheet(134/224 Pages) TOSHIBA

134 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-132

1. Prescaler

There are 9-bit prescaler and prescaler clock selection registers to generate input

clock for 8-bit timer 0, 1, 2, 3, 16-bit timer 4, 5, and serial interface 0, 1.

Figure 3.9.11 shows the block diagram. Table 3.9.1 shows prescaler clock resolution

into the baud rate generator.

Figure 3.9.11 The Block Diagram of Prescaler

Table 3.9.1 Prescaler Clock Resolution to Baud Rate Generator

at fc

= 20 MHz, fs = 32.768 kHz

Prescaler Output Clock Resolution

Select System

Clock

<SYSCK>

Select Prescaler

Clock

<PRCK1:0>

Gear Value

<GEAR2:0>

φ1

φT0

φT2

φT8

φT32

1 (fs)

XXX

fs/2 (61

µs) fs/22 (122 µs) fs/24 (488.5 µs) fs/26 (1.95 µs) fs/28 (7.8 µs)

000 (fc)

fc/2 (0.1

µs) fc/22 (0.2 µs) fc/24 (0.8 µs)

fc/2

6 (3.2

µs)

fc/2

8 (12.8

µs)

001 (fc/2)

fc/2

2 (0.2

µs) fc/23 (0.4 µs) fc/25 (1.6 µs)

fc/2

7 (6.4

µs)

fc/2

9 (25.6

µs)

010 (fc/4)

fc/2

3 (0.4

µs) fc/24 (0.8 µs) fc/26 (3.2 µs)

fc/2

8 (12.8

µs) fc/210(51.2 µs)

011 (fc/8)

fc/2

4 (0.8

µs) fc/25 (1.6 µs) fc/27 (6.4 µs)

fc/2

9 (25.6

µs) fc/211(102.4 µs)

0 (fc)

00 (fFPH)

100 (fc/16)

fc/2

5 (1.6

µs) fc/26 (3.2 µs) fc/28 (12.8 µs)

fc/2

10(51.2

µs) fc/212(204.8 µs)

XXX

(Low-frequency

clock)

XXX

−

fs/2

4 (488.5

µs) fs/26 (1.95 µs) fs/28 (7.8 µs)

XXX

10 (Note)

(fc/16 clock)

XXX

−

fc/2

8 (12.8

µs)

fc/2

10(51.2

µs) fc/212(204.8 µs)

XXX: Don’t care,

−: Can not use

Note: The fc/16 clock as a prescaler prescaler clock can not be used when the fs is used as a system clock.

512

256

128

φT1

φT4

φT16

φT256

φT1

φT4

φT16

φ1

φT0

φT2

φT8

φT32

÷2

÷4

÷16

÷8

÷4

÷2

to CPU

System clock fSYS

9-bit prescaler

To 8-bit

timer 0, 1, 2 and

fc/16

fc/8

fc/4

fc/2

SYSCR1<GEAR2:0>

TRUN<PRRUN>

SYSCR0

<PRCK1:0>

Run/stop

and clear

To 16-bit timer 4

and 5

To serial

interface 0 and

fFPH

XT1

SYSCR1<SYSCK>

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