TMP93CS44 datasheet(36/224 Pages) TOSHIBA

36 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-34

The following (1) to (5) show a flowchart of interrupt processing.

(1) Maskable interrupt

(2) Non-maskable interrupt

(3) Interrupt nesting

(4) Software interrupt

(5) Interrupt sampling timing

(Main)

[4]

[2]

[3]

RETI

[1]

NMI

(Level 7)

[5]

DI instruction is executed in the main program, so that

the interrupts of only level 7 are accepted. The CPU

does not increment the IFF even if the CPU accepts

an interrupt request of level 7.

(NMI interrupt routine)

IFF

← 7

IFF

← 7

(Main)

[4]

[2]

[3]

RETI

[1]

SWI3

[5]

The CPU accepts the software interrupt request

during DI status (IFF

= 7) because of the level 7.

The IFF is not changed by the software interrupts.

(SWI3 routine)

Example:

(Underline):Instruction

[1], [2], …:

Execution flow

RETI

(Main)

EI 3

[7]

[6]

RETI

[1]

INTT0

(Level 3)

[8]

If an interrupt with a level higher than the interrupt being

processed is generated, the CPU accepts the interrupt with the

higher level. The program counter which returns at e is the start

address of INTT0 interrupt routine.

(INTT0 interrupt routine)

XXX

INTT1

(Level 4)

[2]

[4]

RETI

[3]

[5]

(Main)

EI 3

[8]

[2]

[7]

RETI

[1]

INTT0

(Level 3)

[9]

During processing the interrupts of level 3, the IFF is set to 4.

When an interrupt with a level higher than level 4 is generated,

the CPU accepts the interrupt with the higher level, causing

interrupt processing to nest.

(INTT0 interrupt routine) (INTT1 interrupt routine)

IFF

← 4

IFF

← 3

[3]

INTT1

(Level 4)

[6]

[4]

[5]

IFF

← 5

IFF

← 4

(Main)

EI 1

[4]

[2]

[3]

RETI

[1]

INTT0

(Level 1)

[5]

During execution of the main program, the CPU

accepts an interrupt request. The CPU increments the

IFF so that the interrupts of level 1 are not accepted

during processing the interrupt routine.

(INTT0 interrupt routine)

IFF

← 2

IFF

← 1

TMP93CS44 датащи(PDF) 36 Page - Toshiba Semiconductor

TMP93CS44 датащи(HTML) 36 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL