| поискавой системы для электроныых деталей |
|
TMP93CS44 датащи(PDF) 32 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP93CS44 датащи(HTML) 32 Page - Toshiba Semiconductor |
|
32 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-30 Table 3.3.7 Pin States in STOP Mode TMP93CS44 TMP93CS45 Pin Name I/O <DRVE> = 0 <DRVE> = 1 <DRVE> = 0 <DRVE> = 1 Input mode ▲ ▲ × × Output mode High-Z Output × × P00 to P07 AD0 to AD7 High-Z High-Z High-Z High-Z Input mode ▲ ▲ × × Output mode/A8 to A15 High-Z Output × × P10 to P17 AD8 to AD15 High-Z High-Z High-Z High-Z Input mode ▲ ▲ ▲ ▲ P20 to P27 Output mode A0 to A7/A16 to A23 ▲ Output ▲ Output P30 (RD), P31 (WR) Output High-Z Output High-Z “H” level output Input mode PU* PU P32 (HWR/SCK) Output mode PU* Output Input mode Invalid Invalid P33 to P35 Output mode High-Z Output Input mode Invalid Invalid P40 to P47 Output mode High-Z Output P50 to P57 Input ▲ ▲ Input mode PU* PU P60 to P65 Output mode PU* Output Input mode Invalid Invalid P70 to P77 Output mode High-Z Output NMI Input Input Input ALE Output (<ALEEN> = 1) “L” level output “L” level output CLK Output (<CLKEN> = 1) High-Z “H” level output RESET Input Input Input The same as for TMP93CS44 EA Input “H” level fix “H” level fix “L” level fix “L” level fix AM8/ 16 AM Input “H” level fix “H” level fix Input Input X1 Input Invalid Invalid X2 Output “H” level output “H” level output Input mode Invalid Invalid Output mode High-Z Output* P66 XT1 ■ ■ Input mode Invalid Invalid Output mode High-Z Output* P67 XT2 ■ ■ The same as for TMP93CS44 Input: Input gate in operation. Fix input voltage to 0 or 1 so that the input pin stays constant. Output: Output state. Output*: Open-drain output state. Input gate in operation. Set output to “L” or attach pull up on pin so that the input gate stays constant. Invalid: Input is not accepted. High-Z: Output is at high impedance. PU: Programmable pull-up pin in input gate in operation. Fix the pin to avoid through current since the input gate operates when a pull-up pin resistor is not set. PU*: Programmable pull-up pin in input gate disable state. No through current even if the pin is set to high impedance. ▲: When a HALT instruction is executed and the CPU stops at the address of the port register, an input gate operates. Fix the pin to avoid through current, and change the program. ×: Cannot set. ■: To connect a low-frequency resonator to port 66 and port 67, it is necessary to set the following procedures to reduce the consumption power supply. (Connecting to a resonater) Set P6CR<P66C:67C> = “11”, P6<P66:67> = “00” (Connecting to an oscillator) Set P6CR<P66C:67C> = “11”, P6<P66:67> = “10” Note: Port registers are used for controlling programmable pull up. If a pin is also used for an output function (e.g., TO3) and the output function is specified, whether pull up is selected depends on the output function data. If a pin is also used for an input function, whether pull up is selected depends on the port register setting value only. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |