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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS44 датащи(PDF) 133 Page - Toshiba Semiconductor |
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TMP93CS44 датащи(HTML) 133 Page - Toshiba Semiconductor |
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133 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-131 Figure 3.9.10 shows the block diagram of the serial channel 1. Figure 3.9.10 Block Diagram of the Serial Channel 1 φT0 φT2 φT8 φT32 SC1MOD <SC1:0> Receive buffer 1 (Shift register) RXDCLK SC1MOD<CTSE1> TO2TRG (Timer 2 comparator output) UART mode <BR1S3:0> Baud rate generator SC1MOD <SM1:0> ÷2 External clock I/O interface mode SC1CR <IOC> Receive counter (Only UART ÷ 16) Transmission counter (Only UART ÷ 16) Receive control (Only UART ÷ 16) Transmission control (Only UART ÷ 16) INTRX1 INTTX1 Receive buffer 2 (SC1BUF) RB8 Error flag SC1CR <OERR> <PERR> <FERR> Serial channel interrupt control TB8 CTS1 (Shared with P65) TXD1 (Shared with P63) Transmission buffer (SC1BUF) RXD1 (Shared with P64) TXDCLK SC1MOD <WU> System clock/fSYS (φ1) SC1MOD<RXE> SCLK1 output (Shared with P65) SCLK1 input (Shared with P65) SIOCLK Internal data bus Parity control SC1CR <PE> <EVEN> Serial clock generation circuit BR1CR<BR1CK1:0> |
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