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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS44 датащи(PDF) 129 Page - Toshiba Semiconductor |
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TMP93CS44 датащи(HTML) 129 Page - Toshiba Semiconductor |
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129 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-127 Serial Channel 1 Control Register 7 6 5 4 3 2 1 0 Bit symbol RB8 EVEN PE OERR PERR FERR SCLKS IOC SC1CR (0055H) Read/Write R R/W R (Clear to “0” when read) R/W After reset Undefined 0 0 0 0 0 0 0 1: Error Function Received data bit8 Parity 0: Odd 1: Even Parity addition 0: Disable 1: Enable Overrun Parity Framing 0: SCLK1 ( ) 1: SCLK1 ( ) 0: Baud rate generator 1: SCLK1 Pin input Note 1: To use baud rate generator, set TRUN<PRRUN> to 1, putting the prescaler in RUN mode. Note 2: As all error flags are cleared after reading, do not test only a single bit with a bit testing instruction. Figure 3.9.6 Serial Channel 1 Related Register (5/7) Serial transmission clock (for I/O interface mode) (Note1) 0 Baud rate generate 1 SCLK1 pin input Edge selection in SCLK pin input mode 0 Transmits and receives ( ) data at rise edge of SCLK 1 Transmits and receives ( ) data at fall edge of SCLK Enable parity addition 0 Disable 1 Enable Addition/check of even parity 0 Odd parity 1 Even parity Receiving data bit8 8-bit UART mode (Parity) Stores transmission parity bit 9-bit UART mode Stores transmission data bit8 Framing error flag Parity error flag Overrun error flag Cleared to 0 when read (Note 2) |
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