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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS44 датащи(PDF) 128 Page - Toshiba Semiconductor |
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TMP93CS44 датащи(HTML) 128 Page - Toshiba Semiconductor |
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128 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-126 Serial Channel 1 Mode Control Register 7 6 5 4 3 2 1 0 Bit symbol TB8 CTSE1 RXE WU SM1 SM0 SC1 SC0 SC1MOD (0056H) Read/Write R/W After reset Undefined 0 0 0 0 0 0 0 Function Transferred data bit8 Handshake function 0: CTS1 disable 1: CTS1 enable Receiving function 0: Receive disable 1: Receive enable Wakeup function 0: Disable 1: Enable Serial transmission mode 00: I/O interface mode 01: 7-Bit UART 10: 8-Bit UART 11: 9-Bit UART Serial transmission clock (UART) 00: TO2 trigger 01: Baud rate generator 10: Internal clock φ1 11: External clock (SCLK1 input) Figure 3.9.5 Serial Channel 1 Related Register (4/7) Serial transmission clock (for UART mode) 00 Timer 2 match detect signal 01 Baud rate generator 10 Internal clock φ1 (fSYS) 11 External clock (SCLK1 input) Wakeup function (Don’t care in the modes other than 9-bit UART) 0 Disable 1 Enable Serial transmission mode 00 Serial transmission mode 01 7-bit length 10 8-bit length 11 UART mode 9-bit length Receiving control 0 Receive disable 1 Receive enable Handshake function ( 1 CTS pin) 0 Disable (Always transferable) 1 Enable Transmission data bit8 8-bit UART mode (Parity) Stores transmission parity bit 9-bit UART mode Stores transmission data bit8 The clock selection for the I/O interface mode is controlled by the serial control register (SC1CR). |
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