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TMP93CS41 датащи(PDF) 162 Page - Toshiba Semiconductor

номер детали TMP93CS41
подробное описание детали  CMOS 16-Bit Microcontroller
PDF  248 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TMP93CS41 датащи(HTML) 162 Page - Toshiba Semiconductor

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TMP93CS40/TMP93CS41
2004-02-10
93CS40-160
Figure 3.10.8 Pattern Generation Mode Block Diagram (PG0)
In pattern generation mode, only writing to the output latch can be disabled by hardware.
All other functions behave in the same way as 1 to 2 step excitation in stepping motor
control port mode. Hence, data shifted on the trigger signal from a timer must be written
before the next trigger signal is output.
Shift alternate register
PG03
(P63)
BUS3
PG02
(P62)
BUS2
PG01
(P61)
BUS1
PG00
(P60)
BUS0
Shift performed on shift trigger from timer
SA03
PG03
PG02
SA02
PG01
SA01
PG00
SA00



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